The IVOR1 IRQ is caused by SPC5746R triggering an interrupt.

[Jasting]

I am currently using the SPC5746RMMT5 chip and enter the IVOR1_IRQ interrupt when debugging eTPU set2 with S32 DS for Power.
The TG function is working fine for now, but when I set the Crank capture interrupt, it triggers the IVOR1_IRQ interrupt.
Check that the MCSR is not incorrectly set.

How can I fix it?

[Jasting]

不好意思，之前看到MCSR没有数据，是因为没有获取寄存器数据。下面是寄存器的数据.

How do I fix this

[davidtosenovjan · Accepted solution]

If you are using original etpu sets with MPC57xx devices, it is possible it is needed to initilize ECC as follows:

#define eTPU_AB_SPRAM_start 0xFFCC8000
#define eTPU_AB_SPRAM_end 0xFFCCBFFF

/* Clear all ETPU SRAM memories due to ECC */
// eTPU A/B parametric RAM
for (i=eTPU_AB_SPRAM_start; i<eTPU_AB_SPRAM_end; i=i+4)
{
(*(uint32_t *) i) = 0;
}

In the past I made example code for this:

https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/Example-MPC5746R-eTPU-original-set1-integration-...

[Jasting]

Thank you very much. You have solved this problem for me！