STM source clock of S32R274

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

STM source clock of S32R274

ソリューションへジャンプ
756件の閲覧回数
Durant-Harden-Irving
Contributor III

Hello,

Now I am developping the STM module of S32R274.

I want to make sure that which clock is used for STM counter calculation? System clock or PBRIDGE_n_CLK?

Backgrount:  In the document "S32R274RM.pdf" :

1. page 155, figure 5-4  , we can see, the souce clock of STM is PBRIDGE_n_CLK

2. But in page 2356, we can see, the source clock is System clock : "The counter is driven by the system clock divided by an 8-bit prescale value (1
to 256)."

 

Thanks!

MF
0 件の賞賛
1 解決策
741件の閲覧回数
davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, PBRIDGE_n_CLK is correct.

From module’s perspective it is system clock, unfortunately it is relic from internal documentation for the module. Figure 5-4 shows clock routing given by device integration and you may see both used clocks for STM are tied to PBRIDGE_n_CLK.

元の投稿で解決策を見る

2 返答(返信)
731件の閲覧回数
Durant-Harden-Irving
Contributor III

Hi David,

Thanks very much!

MF
0 件の賞賛
742件の閲覧回数
davidtosenovjan
NXP TechSupport
NXP TechSupport

Hi, PBRIDGE_n_CLK is correct.

From module’s perspective it is system clock, unfortunately it is relic from internal documentation for the module. Figure 5-4 shows clock routing given by device integration and you may see both used clocks for STM are tied to PBRIDGE_n_CLK.