MPC574x SWT issue

[jefferson_ll]

Dear NXP,

I'm using MPC5744p SWT with S32 ds IDE.

I have referenced the sample code "Example MPC5744P SWT Short reset GHS614".

There are some functions were used in my project, such as following:
void main()
{
/*Clock configuration and mode transition to RUN0*/
Sys_Init();

/*Clear faults in FCCU*/
FCCU_clear_faults();

/*Configure FCCU for SWT reset reaction*/
FCCU_Init();

/*Initialize and start SWT*/
SWT_Init();
while(1);
}


The SWT fails works when system run into SWT_Init() and implement "SWT_0.SR.R = 0xC520;".
I used to step over (in debug mode) and free run mode (not in debug mode), respectively.
It always shows "IVOR1_Vector() at 0x1001010" when implement "SWT_0.SR.R = 0xC520;".

I have encountered this problem before when the clock source doesn't enable when writing ADC register.

Does this same as clock issue?

Please help me thank you.

[jefferson_ll · Accepted solution]

Hi Peter,

Thanks for your help.

I have found something wrong and the SWT issue has solved.

In my project startup.s file, the bit of MAP0 need to enable so that 0x7F00 modified into 0xFF00.

Show as the following code:

e_lis r4, 0xFC05
e_or2i r4, 0x0000

e_li r3, 0xC520
e_stw r3, 0x10(r4)

e_li r3, 0xD928
e_stw r3, 0x10(r4)

//e_lis r3, 0x7F00 fail
e_lis r3, 0xFF00 //good
e_or2i r3, 0x010A
e_stw r3, 0(r4)

Now the SWT works well and could enter SWT interrupt after second overflow time.

[jefferson_ll]

Hi Peter,

Thanks for your reply.

Could you tell more detail about PBRIDGE - SWT?
How to check the write permission?

[petervlna]

Please refer to chapter AIPS in reference manual.

and

19.2.3 Off-Platform Peripheral Access Control Register (AIPS_OPACRn)

for more details.

Peter

[petervlna]

Hi,

I have tested this code many times an it is working.

Maybe your core cont have permission to write to slave (PBRIDGE - SWT) and therefore it triggers IVOR1.

Please check it.

Also it is always useful to share code (at east binary) when you want use to analyze your issue.

Peter