MPC5748G: What is the purpose of PLLDIG.PLLCAL3 register (not present in MPC5748GRM) and how to configure it?

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MPC5748G: What is the purpose of PLLDIG.PLLCAL3 register (not present in MPC5748GRM) and how to configure it?

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alexvinchev
Contributor V

Value of this register is different in AN4830 and MPC5748GRM document...

According to MPC5748G header files (all versions, seen by me: V2.1.5, V2.1.12 and V3.0.00) this register contains 2 don't care bits, followed by 16 bits, specifying MFDEN, followed by 14 don't care bits:

  union {                          /* PLL Calibration Register 3 */
vuint32_t R;
struct {
  vuint32_t  :2;
  vuint32_t MFDEN:16;          /* Denominator fo fractional loop division factor. */
  vuint32_t  :14;
} B;

  } PLLCAL3;

 

Reading MPC5748GRM (on page 1200, PLLDIG.PLLCAL3.R = 0x09C3C000), MFDEN value is 0x24CF:

Reading mode_entry.c (PLLDIG.PLLCAL3.R = 0x00004062;  /* Set MFDEN a nonzero value (0x1 here) */) in AN4830SW package, MFDEN value is 0x0001 and next 14 reserved bytes are 0x0062.

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petervlna
NXP TechSupport
NXP TechSupport

Hi there,

The PLLDIG.PLLCAL3 register description was accidentally removed from RM rev 3.

Revision 3 is the latest release of RM. However the revision 4 which is at this time still under review have this issue fixed.

Here is the missing PLLCAL3 register description (It is also correct in rev2):

pastedImage_0.png

Regarding the PIT example, I will verify it and update if needed.

Header file used in PIT example is the latest one.

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6 Replies
1,136 Views
alexvinchev
Contributor V

I've checked some other RM of MCU's from same MPC57xx family and seems that they have different PLL module, so there is no PLLCAL3 register at all...

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

PLLCAL3[MFDEN] register bit field  is used for PLL clock calculation.

The AN software can be from older date and can be developed on older cut.

I suggest you to stick always with latest reference manual.

1,136 Views
alexvinchev
Contributor V

Hi Peter,

thank you for your answer.

I'm using latest RM, available on Freescale's website, which is: "MPC5748G Reference Manual, Rev. 3 , 04/2014"

PLLCAL3 is mentioned _ONCE_ in this document, at page 1200 : "PLLDIG.PLLCAL3.R = 0x09C3C000;".

With a bit of looking, PLLCAL3 should take place in the calculations, shown in "25.7.2 Clock configuration" chapter at page 622. I guess that PLLCAL3 = 2^12 in the equations.

I'm setting PLLFD.MFN to zero, so this part of the equation is invalidated. Anyhow, this register is not described anywhere within the manual what is doing an how it should be set, but is still present in the examples (all examples I've seen so far, including PIT one, available here) and even in the RM (as PLL setting example at page 1200, should I copy it blindly? This example is wrong by the way, it sets PHI_0 to 80MHz, while stating that PLL is set to 160MHz. RFDPHI should be set to 1 in order to have division by 4, setting of 2 means that clock will be divided by 8, so 640MHz/8 = 80MHz) and header files, available to me.

What is latest revision of the MPC5748G header file, created by Freescale? Where I could find it? Maybe there this register does not even exist...

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petervlna
NXP TechSupport
NXP TechSupport

Hi there,

The PLLDIG.PLLCAL3 register description was accidentally removed from RM rev 3.

Revision 3 is the latest release of RM. However the revision 4 which is at this time still under review have this issue fixed.

Here is the missing PLLCAL3 register description (It is also correct in rev2):

pastedImage_0.png

Regarding the PIT example, I will verify it and update if needed.

Header file used in PIT example is the latest one.

1,136 Views
alexvinchev
Contributor V

Thank you petervlna! Very helpful reply!

BTW, is there a way to download previous revisions of the MPC5748G RM? It will be helpful to have them in hand in case of such troubles...

I have another point regarding header files, but it will be posted in separate thread.

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petervlna
NXP TechSupport
NXP TechSupport

Unfortunately there is no official way how to get older versions of reference manual.

But the RM rev4 will be released very soon - in 2 weeks.

This one is much better than rev3.