Hi. I'm using MPC5748G.
In FlexCAN register, there is a CAN_CTRL1.BOFFREC bit.
I want to disable the automatic recovering from Bus Off state, so I asserted CAN_CTRL1.BOFFREC bit.
And I caused the bus off state.
As I know, the Bus Off state will be recovered after 128 sequences of 11 recessive bit occurred, but nothing happen when I wait.
The reference manual say 'If the negation occurs after 128 sequences of 11 recessive bits occurred, the FlexCAN will re-synchronize to the bus by waiting for 11 recessive bits before joining the bus.'.
Do I clear the bit to get out of the bus off state?
Solved! Go to Solution.
Hi
Yes the module remains in bus off state until the bit is negated by the user
In case the automatic recovery mode is disabled, BOFF_REC = 1, the recovery from bus-off starts after both independent events have become true:
So if negation happens
- before 128 sequences of 11 recessive bits are detected on the CAN bus, then Bus Off recovery happens in similar way as in automatic recovery mode.
- after 128 sequences of 11 recessive bits occurred, then FlexCAN will resynchronize to the bus by waiting for 11 recessive bits before joining the bus.
In automatic Bus-off recovery mode the behavior is the same, you just do not clear BOFF_REC, soo… after 128 sequences of 11 recessive bits occurred, then FlexCAN will resynchronize to the bus by waiting for 11 recessive bits before joining the bus.
BR, Petr
Thanks, it really helps!!!
Here is one more question.
CAN_ESR1.BOFFDONEINT is set after counting 128 occurrences of 11 consecutive recessive bits on the CAN bus.
And if CAN_ERS2.BOFFDONEMSK is set, an interrupt is generated to the CPU.
How is this related with CAN_CTRL1.BOFFREC bit?
I asserted CAN_CTRL1.BOFFREC and asserted CAN_ERS2.BOFFDONEMSK, but didn't get out of the Bus-off state.
Is CAN_CTRL1.BOFFREC bit only related to get out of the Bus-Off state?
Hi
Yes the module remains in bus off state until the bit is negated by the user
In case the automatic recovery mode is disabled, BOFF_REC = 1, the recovery from bus-off starts after both independent events have become true:
So if negation happens
- before 128 sequences of 11 recessive bits are detected on the CAN bus, then Bus Off recovery happens in similar way as in automatic recovery mode.
- after 128 sequences of 11 recessive bits occurred, then FlexCAN will resynchronize to the bus by waiting for 11 recessive bits before joining the bus.
In automatic Bus-off recovery mode the behavior is the same, you just do not clear BOFF_REC, soo… after 128 sequences of 11 recessive bits occurred, then FlexCAN will resynchronize to the bus by waiting for 11 recessive bits before joining the bus.
BR, Petr
Thanks, it really helps!!!
Here is one more question.
CAN_ESR1.BOFFDONEINT is set after counting 128 occurrences of 11 consecutive recessive bits on the CAN bus.
And if CAN_ERS2.BOFFDONEMSK is set, an interrupt is generated to the CPU.
How is this related with CAN_CTRL1.BOFFREC bit?
I asserted CAN_CTRL1.BOFFREC and asserted CAN_ERS2.BOFFDONEMSK, but didn't get out of the Bus-off state.
Is CAN_CTRL1.BOFFREC bit only related to get out of the Bus-Off state?