MPC5746C Operating the PIT register causes a machine check to be interrupted。

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MPC5746C Operating the PIT register causes a machine check to be interrupted。

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my_souls
Contributor III

MPC5746C Operating the PIT register causes a machine check to be interrupted

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

I am afraid this is not possible. External interrupt cannot interrupt Machine check.

regards,

Peter

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my_souls
Contributor III

Hi,

     I use the official demo, but I don't know why, when running to the PIT register operation, the program jumps to IVOR1_Handler. I have this problem with PIT Demo or CAN Demo alone. What conditions might cause this problem? At present, 8 pieces of MPC5746C in the hand have such problems.

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petervlna
NXP TechSupport
NXP TechSupport

Hi,

What exactly you are doing when the code jumps to IVOR1?

Is it PIT configuration?

Which instruction caused jump to IVOR1?

Could you possibly share the code output file with me?

regards,

Peter

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my_souls
Contributor III

Hi,

Thank you very much for your answer. I seem to have found the problem. Currently, there is no OSC32K external pin in the MCU of the MPC5746C 100MAPBGA, and MC_ME.DRUN_MC.SXOSCON is enabled in the Demo of the SDK, but it does not judge and wait for MC_ME.GS. The .B.S_MTRANS bit is set to 0, so the program jumps to the IVOR1_Handler interrupt when the PIT register is manipulated.
It seems that the officially provided Demo Code does not distinguish the 100MAPBGA of the MPC5746C from other Pin packages

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