I have a question regards to the MCAL configuration for DMA and ADC.
I configured a ADC group under EQADC-A ADC0, when I configure to use FIFO 0 and DMA (For DMA I configured DMA channel and callback function in the MCL module and add interrupt for DMA), it is working properly. However, when I change from FIFO 0 to FIFO 1 and apply similar configurations in the MCL module and interrupt vector table, The ADC is not triggered even through I choose the same trigger source as the one I tested when using FIFO 0.
Is there any clue that I can fix this problem?
Thanks a lot
did you change the dma channel used to associate with the corresponding fifo? see dma mapping table 4-5 in the RM. and what is MCL module?
Hello. the MCL module is a Microcontroller library that can configure the DMA channels.
Currently I fixed the issue I listed above. Thanks for the clue.
However, I have a new problem regards to the : Is it OK to configure two groups that use different FIFOs inside the same ADC hardware unit. And each group use different Hardware trigger sources.
Example:
In ADC unit 0:
Group 1 has channel 1, use FIFO 1 and hardware triggered by ETRIG1.
Group 0 has channel 0, use FIFO 0 and hardware triggered by ETRIG0. I configured two signals with the phase shift to feed the ETRIG0 and ETRIG1.
Problem: only group 0 is triggered, group 1 has never been triggered.
Is there any way that I can deal with this problem?
Thanks for the help