IVOR4 execution time

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737件の閲覧回数
mehmetkaradag
Contributor III

Hi NXP engineers,

I'm using MPC5777C.

I couldn't find how long it took to execute the assembly codes in IVOR4 in Core reference manuel. It is required for safety.

thank you for helps.

mehmetkaradag_0-1683267889279.png

 

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676件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

This is the default configuration in the mentioned example:

lukaszadrapa_0-1683883976162.png

My recommendation is to keep the cache enabled, especially on this device. It helps to increase the performance a lot. 

https://www.nxp.com/docs/en/application-note/AN4097.pdf

Is there's 40MHz crystal on your board?

Regards,

Lukas

 

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725件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

Hi @mehmetkaradag 

it depends on system clock, on number of flash wait states, if the cache is enabled and if the code is already cached...

In general, I would expect some lower tens of core cycles for prologue.

To get more accurate value, the best way is to do some measurement directly in your system. Easiest option is to use external interrupt on a pin - the handler then can toggle a GPIO right at the beginning of interrupt handler, so you can measure the time by an oscilloscope - from edge on external interrupt pin to edge on toggled GPIO.

It also depends if there are other interrupts, if nesting is enabled etc. High priority interrupt can block low priority interrupt, so it's always necessary to consider whole system.

Regards,

Lukas

692件の閲覧回数
mehmetkaradag
Contributor III

Hi,

i am using the clock speed that you adjust in example swt_interrupt_mpc5777c. I don't know what clock is in that example. i will be glad if you say me.  And cache is closed. interrupt latency was approximately measured as 1.5us. i did what you said so toggling led in ISR. as a result i mean that 1.5us is normal? as if it is much according to me.

green is button. yellow is led. when button pressed led is toggled. i have measured the time that the position of the led changes when the button is pressed. 

thanks for help.

 

WhatsApp Image 2023-05-10 at 12.08.05.jpeg

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677件の閲覧回数
lukaszadrapa
NXP TechSupport
NXP TechSupport

This is the default configuration in the mentioned example:

lukaszadrapa_0-1683883976162.png

My recommendation is to keep the cache enabled, especially on this device. It helps to increase the performance a lot. 

https://www.nxp.com/docs/en/application-note/AN4097.pdf

Is there's 40MHz crystal on your board?

Regards,

Lukas