INTC and IVOR_branch_table

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

INTC and IVOR_branch_table

1,025件の閲覧回数
andrerm
Contributor II

Hello everyone.
I'm working on MPC5777M. I have a problem with INTC management. When the PIT_CVAL reaches zero and sets the interrupt flag (TFLG0.TIF) register at 1, I jump to the IVOR_branc_table correctly(i think). Although the address is right I can not succeed in making the next jump for managing the IVOR4. It almost seems as if I lose control of the device.

I set the INTC_CPR2 to priority 0 and the register INTC_PSR [TFLG0] to 1 as read on some Application Notes, the IVOR_branch_table address is correct so I do not understand where the problem is.

Do you have any suggestions? Any example?

0 件の賞賛
1 返信

629件の閲覧回数
petervlna
NXP TechSupport
NXP TechSupport

Hi,

This should be quite strait forward.

We have posted examples for what you are trying to achieve here on community:

Example MPC5777M PIT ISR GHS614 

And also bunch of other examples on main example repository:

https://community.nxp.com/docs/DOC-329623 

I suggest you to check the first one. If you will still struggle we can have a look at yours. But you have to share with us at least output file (bin, elf, s3, etc..)

Peter