IVOR1_Handler:
prolog_IVOR1:
e_stwu r1, -0x50(r1) # Create stack frame and store back chain
se_stw r0, 0x20(r1) # Store GPR0 (working register)
se_mfctr r0
se_stw r0, 0x10(r1) # Store CTR
mfxer r0
se_stw r0, 0x14(r1) # Store XER
mfcr r0
se_stw r0, 0x18(r1) # Store CR
se_mflr r0
se_stw r0, 0x1C(r1) # Store LR
se_stw r3, 0x24(r1) # Store GPR3
se_stw r4, 0x28(r1) # Store GPR4
se_stw r5, 0x2C(r1) # Store GPR5
se_stw r6, 0x30(r1) # Store GPR6
se_stw r7, 0x34(r1) # Store GPR7
e_stw r8, 0x38(r1) # Store GPR8
e_stw r9, 0x3C(r1) # Store GPR9
e_stw r10, 0x40(r1) # Store GPR10
e_stw r11, 0x44(r1) # Store GPR11
e_stw r12, 0x48(r1) # Store GPR12
mfmsr r0 # As function prologs/epilogs may contain
e_or2is r0, 0x0200 # SPE instruction, enable SPE, as MSR
mtmsr r0 # register is cleared at this point
e_lis r0, IVOR1_Exception_Handler@h
e_or2i r0, IVOR1_Exception_Handler@l
mtlr r0 # Store LR
se_blrl # Branch to ISR, return here
epilog_IVOR1:
se_lwz r3, 0x24(r1) # Restore GPR3
se_lwz r4, 0x28(r1) # Restore GPR4
se_lwz r5, 0x2C(r1) # Restore GPR5
se_lwz r6, 0x30(r1) # Restore GPR6
se_lwz r7, 0x34(r1) # Restore GPR7
e_lwz r8, 0x38(r1) # Restore GPR8
e_lwz r9, 0x3C(r1) # Restore GPR9
e_lwz r10, 0x40(r1) # Restore GPR10
e_lwz r11, 0x44(r1) # Restore GPR11
e_lwz r12, 0x48(r1) # Restore GPR12
mfmcsrr0 r0
e_add16i r0,r0,0x2
mtmcsrr0 r0
# mfmcsrr1 r0
# mtmsr r0
se_lwz r0, 0x10(r1)
se_mtctr r0 # Restore CTR
se_lwz r0, 0x14(r1)
mtxer r0 # Restore XER
se_lwz r0, 0x18(r1)
mtcr r0 # Restore CR
se_lwz r0, 0x1C(r1)
se_mtlr r0 # Restore LR
se_lwz r0, 0x20(r1) # Restore GPR0 (working register)
e_add16i r1, r1, 0x50 # Clean up stack
se_rfmci # Return from machine check
# rfi
Hi, quoting AN5200 section 5.1.1:
"MCSR[MAV] - indicates that the address contained in the MCAR was updated by hardware. Note that
next update is only performed when this bit is explicitly cleared by w1c operation („write 1 to clear“)."
I believe this answers your question.
Thanks David. Exception Handler I was using was not clearing these bits. After Clearing these bits it is working fine now.