I am referring the code in above example to implement Error injection code..
Please provide below info..
1. Is mandatory to have test address aligned to 8 bytes? Why?
2. In example code after configuring EIM, Read operation is used to generate the ECC error. can we use write operation? How it will differ?
3. How error injection will differ when I use 32-bit read/write compared to 64-bit read/write when test address not aligned to 8 bytes?
1) Yes, it must be aligned to 64-bit (8 bytes) as it is granularity to completely define ECC code for data unit. During error injection we need to perform one 64-bit write. In case it would not be aligned, it would read-modify-write sequence (thus access in multiple beats), what we don't want.
2) Error caused by write to area affected by ECC multibit error (this can be achieved by 32-bit, 16-
bit and 8-bit write as it behaves as read-modify-write operation above 64-bit) sets additionally MCSR[BUS_WRERR] bit, in other aspect it basically the same.
3) It would be just further complication, two misaligned writes basically affects two ECC data units. I would recommend to have 64-bit aligned.