******************************************************************************** * Detailed Description: * Used flash driver:  MPC5700 C55FG Flash Standard Software Driver (REV 1.1.0) * http://www.nxp.com/files/product/software/C55_JDP_SSD.exe * * This example checks four large 256KB flash blocks at address 0x0100_0000 - * 0x010F_FFFF. * Some random data are placed to this section (constant "flash_data[]"), so the * s-record is not empty. * It is necessary to use off-line MISR_C55.exe tool which calculates MISR * values for selected flash blocks. See the "MISR gen" folder included in this * project. File "core0.run" is s-record file which is used for calculation. It * contains the data (constant "flash_data[]") placed to the selected blocks. * "misr.bat" file shows how to call the calculator. * "output.txt" contains the result of this operation - the MISR values. * Once this is done, initialize the SSD drivers, unlock blocks which are going * to be checked and run the FlashArrayIntegrityCheck function. * Notice that the code must be executed from RAM. We cannot access the flash * during this operation. If the operation is successful, FlashCheckStatus will * return opResult C55_OK if the MISR values are equal. It will return * C55_ERROR_MISMATCH if the MISR values are not equal, i.e. the flash is * corrupted and the content does not correspond to s-record file. * ------------------------------------------------------------------------------ * Test HW:         X-MPC5744PE257DC, MPC57xx motherboard * MCU:             PPC5744PFMMM8 1N65H * Fsys:            200 MHz PLL * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * ********************************************************************************

IDE: CodeWarrior 10.6 mcu:MPC5606B Conversion Mode:Scan Channel: ADC1, 1\2\3\13\14 End of Chain Conversion interrupt enable; QQ:511437685

******************************************************************************** * Detailed Description: * This example shows how to configure Wake up unit and CAN sampler. * Once the device is woken up from STOP mode by falling edge on CAN0RX pin, * the CAN sampler starts to sample this pin in given period. * FlexCAN module is not initialized and used in this example because the CAN * sampler is independent of FlexCAN. * ------------------------------------------------------------------------------ * Test HW:  XPC56xxMB2 + XPC560B 176LQFP, PPC5607B * Target :  internal_FLASH, RAM * Fsys:     64 MHz PLL * ********************************************************************************

Hardware:TRK-MPC560XB, IDE:codewarrior 10.6; External Crystal Oscillator: 8M System Core Frequency: 64MHz FlexCAN Baute rate: 250bps BUF[1] Interrupt, Bus Off Interrupt, Err Interrupt enable;   QQ:511437685