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* Detailed Description:
* Application performs basic initialization, setup PLL to maximum allowed freq.,
* setup clock for peripherals, GPIO pins.
* DSPI1 module is configured as a master, DSPI2 module is configured as a slave.
* First, response of slave is initialized by writing to PUSHR register of DSPI2.
* Second, we write PUSHR register of DSPI1 to send data from master.
* Once data are received on both master and slave, data are read from POPR.
* ------------------------------------------------------------------------------
* Test HW: MPC5746R-176DC, MPC57xx Motherboard
* MCU: PPC5746R 1N83M
* Fsys: PLL 200MHz
* Debugger: Lauterbach Trace32
* IDE: S32DS for Power 2017.R1
* Target: internal_FLASH (debug mode, debug_ram mode)
* EVB connection:
* Connect PA13 (P8.14) to PS11 (P27.12)
* Connect PA10 (P8.11) to PS10 (P27.11)
* Connect PG12 (P14.13) to PS13 (P27.14)
* Connect PG13 (P14.14) to PS7 (P27.8)
*
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