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* Detailed Description:
*
*
* This example shows synchronization between eTimer, CTU and ADC modules.
* The eTimer0 module timer 2 is initialized to generate PWM signal, and rising edge
* of this signal is used to generate trigger signal for CTU module. The CTU module
* use one command list with 4 ADC_0 channels. Single conversion mode is used,
* so ADC0 ch0, ch1, ch2 and ch3 are sampled.
* ------------------------------------------------------------------------------
* Test HW: MPC57xx
* Maskset: 1N65H
* Target : internal_FLASH
* Fsys: 200 MHz PLL with 40 MHz crystal reference
*
* EVB connection:
*
* P8.1 - A[0] .. GPIO output, used to see CTU-ADC ISR period
* P9.1 - B[7] .. ADC0 AN[0] input
* P9.2 - B[8] .. ADC0 AN[1] input
* P16.4 - I[3] .. CTU0 EXT TRG output
*
* see CTU0 EXT TRG output signal (toggle on each trigger) on P16.4 with respect of eTimer PWM signals.
*
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Hi Pat,
Feel free to create a new thread. So others can also join a discussion.
If your questions are related to any issues in my examples than feel free to write here.
Peter