rt1170 evk demo board enable octal flash

pupu_ji

hi, all

I tried following the instructions below to use the demo board's octal flash

https://community.nxp.com/t5/i-MX-RT-Knowledge-Base/RT1170-Octal-flash-enablement/ta-p/1498369

as 3.2 this process also seems to be correct.

and I used the program "evkmimxrt1170_iled_blinky_octalFlash_cm7" in the attachment.

but something is wrong

MCUXpresso IDE RedlinkMulti Driver v11.9 (Apr  5 2024 19:43:49 - crt_emu_cm_redlink build 47)
Found chip XML file in G:/2_workspace/1_qtmcu/evkmimxrt1170_iled_blinky_octalFlash_cm7/Debug\MIMXRT1176xxxxx.xml
(  5) Remote configuration complete
Reconnected to existing LinkServer process.
============= SCRIPT: RT1170_connect_M7_wake_M4.scp =============
RT1170 Connect M7 and Wake M4 Script
DpID = 6BA02477
APID = 0x84770001
Setting M4 spin code
Setting M4 clock
Resetting M4 core
Releasing M4
View cores on the DAP AP
DpID = 6BA02477
TAP 0: 6BA02477 Core 0: M7  APID: 84770001 ROM Table: E00FD003*
TAP 0: 6BA02477 Core 1: M4  APID: 24770011 ROM Table: E00FF003
============= END SCRIPT ========================================
Probe Firmware: CMSIS-DAP (ARM)
Serial Number:  02440000352e1b8600000000000000000000000097969905
VID:PID:  0D28:0204
USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#8&1af57743&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
Using memory from core 0 after searching for a good core
debug interface type      = CoreSight DP (DAP DP ID 6BA02477) over SWD TAP 0
processor type            = Cortex-M7 (CPU ID 00000C27) on DAP AP 0
number of h/w breakpoints = 8
number of flash patches   = 0
number of h/w watchpoints = 4
Probe(0): Connected&Reset. DpID: 6BA02477. CpuID: 00000C27. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FD000: CID B105100D PID 000008E88C ROM (type 0x1)
ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM (type 0x1)
ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM (type 0x1)
ROM 3 E000E000: CID B105E00D PID 04000BB00C Gen SCS (type 0x0)
ROM 3 E0001000: CID B105E00D PID 04000BB002 Gen DWT (type 0x0)
ROM 3 E0002000: CID B105E00D PID 04000BB00E Gen (type 0x0)
ROM 3 E0000000: CID B105E00D PID 04000BB001 Gen ITM (type 0x0)
ROM 2 E0041000: CID B105900D PID 04001BB975 CSt ARM ETMv4.0 type 0x13 Trace Source - Core
ROM 2 E0042000: CID B105900D PID 04004BB906 CSt type 0x14 Debug Control - Trigger, e.g. ECT
ROM 1 E0043000: CID B105900D PID 04001BB908 CSt CSTF type 0x12 Trace Link - Trace funnel/router
NXP: MIMXRT1176xxxxx
DAP stride is 1024 bytes (256 words)
Inspected v.2 External Flash Device on SPI using SFDP JEDEC ID MIMXRT1170_SFDP_MXIC_OPI.cfx
Image 'iMXRT1170_SFDP_FlexSPI1_MXIC_OPI Apr  5 2024 18:35:51'
Opening flash driver MIMXRT1170_SFDP_MXIC_OPI.cfx
Sending VECTRESET to run flash driver
request to clear DAP error failed - status 5
After error Nn(05). Wire ACK Fault in DAP access -
Failed to read address register in DAP - Nn(05). Wire ACK Fault in DAP access
flash driver polled mailbox (8 bytes at 0x2000A7D8) read failed (on poll 1/301) - retrying after 1ms - rc Em(17). Debug port inaccessible after access at location 0x2000A7D8
request to clear DAP error failed - status 5
After error Nn(05). Wire ACK Fault in DAP access -
Failed to read address register in DAP - Nn(05). Wire ACK Fault in DAP access
flash driver polled mailbox (8 bytes at 0x2000A7D8) read failed (on poll 1/301) - halting for postmortem - rc Em(17). Debug port inaccessible after access at location 0x2000A7D8
failed to halt target for postmortem - rc Nn(05). Wire ACK Fault in DAP access
request to clear DAP error failed - status 5
failed to read registers - Nn(05). Wire ACK Fault in DAP access
Flash Driver V.2 startup failed - rc Em(17). Debug port inaccessible after access at location 0x2000A7D8
chip initialization failed - Em(17). Debug port inaccessible after access at location 0x2000A7D8
failed to initialize flash driver MIMXRT1170_SFDP_MXIC_OPI.cfx
request to clear DAP error failed - status 5
request to clear DAP error failed - status 5
error closing down debug session - Nn(05). Wire ACK Fault in DAP access

I also modified the cfx file according to the instructions but it didn't work.

BUT

If I use this MIMXRT1170_SFDP_QSPI.cfx file,SW2-3 ON, then my project can be downloaded. But there will be issues after reset or re-downloading.

Is there something wrong with my configuration? Can anyone help provide a direction to solve the problem?

thank you！

kerryzhou

Hi @pupu_ji ,

Don't worry, take easy.

1. In the MCUbootutility, use mass erase at first

2. your app

What's the app you are using?

You need to make sure your APP FCB is the octal flash, do you use my attached project in my document?

Please help to check it.

Don't worry, I have tested all of it previously, and it works in the previous time, if you still have issue, I will help you to test it on my side again.

Best Regards,

Kerry

View solution in original post

kerryzhou

Hi @pupu_ji ,

Thanks you for your interest in the NXP MIMXRT product, I would like to provide service for you.

Do you already modify your board from QSPI flash to the octal flash?

My document is for the octal flash, but the MIMXRT1170-EVK in default is the QSPI flash.

So, if you just want to run the MIMXRT1170-EVK board, you totally don't need to refer my document.

But, if you want to use the octal flash, you must must must modify the hardware from QSPI flash to octal flash at first, please check your board hardware at first, then refer to my doc step by step.

If you still have question about it, please kindly let me know.

Best Regards,

kerry

pupu_ji

Thank you for your reply!
I already modify the hardware from QSPI flash to octal flash.

If I use this tool to download the octal flash program , choose octalspi mx25um51345g, and the lights on the demo board can blink, can I consider that the hardware has been modified correctly?

But when I use IDE to try to download the project from the attachment and select the octal cfg file, it fails.

Could you please help provide a direction to solve the problem?? Thank you.

kerryzhou

Hi @pupu_ji ,

1. Hardware, MIMXRT1170-EVK board

Please check R378, R412 is solder.

Please also make sure, J5,J6,J7,J8 is insert

2. In your MCUBootutility, do the mass erase at first.

3. your use MIMXRT1170_SFDP_MXIC_OPI.cfx is in the IDE:

C:\nxp\MCUXpressoIDE_11.9.0_2144\ide\LinkServer\binaries\Flash

Right?

Do you mean, you use the default IDE .cfx is not OK?

Your debugger is CMSIS DAP or JLINK?

.cfx is for the CMSIS DAP, JLINK is need to use the RT-UFL.

Best Regards,

Kerry

pupu_ji

hi,

"1. Hardware, MIMXRT1170-EVK board

Please check R378, R412 is solder.

Please also make sure, J5,J6,J7,J8 is insert"

OK, I've checked all of this.

"2. In your MCUBootutility, do the mass erase at first."

ok, I do this ><

“3. your use MIMXRT1170_SFDP_MXIC_OPI.cfx is in the IDE:

C:\nxp\MCUXpressoIDE_11.9.0_2144\ide\LinkServer\binaries\Flash

Right?”

Yes, I use CMSIS DAP, default IDE .cxf is not ok, and I try to add "MEM_WriteU32(0x400E835C,0x12)" is is still no effect. TOT

kerryzhou

Hi @pupu_ji ,

Don't worry, take easy.

1. In the MCUbootutility, use mass erase at first

2. your app

What's the app you are using?

You need to make sure your APP FCB is the octal flash, do you use my attached project in my document?

Please help to check it.

Don't worry, I have tested all of it previously, and it works in the previous time, if you still have issue, I will help you to test it on my side again.

Best Regards,

Kerry

pupu_ji

hi,

I found the cause of the error and soldered the R1887 in the schematic. And the project was also successful using your example. Thank you very much for your support!

kerryzhou

Hi @pupu_ji ,

Thanks so much for your effort and the updated information.

You mean, your board also solder the R1887 which should DP, right?

You soldered the R1887 in mistake, right?

Best Regards,

Kerry

pupu_ji

Yes, I soldered the R1887 by mistake.><

kerryzhou

Hi @pupu_ji ,

That's reasonable.

As then, if do the flash reset, it will even reset the POR, then the RT chip will also be powered, that's why all the chip debugger connection lost.

Anyway, it's OK now, just enjoy it.

If you have any new issues in the future, welcome to create the new question post to discuss it.

Best Regards,

Kerry

pupu_ji

Hi,

Yes,I used the attached project in your document !

And I've followed the documentation but it still fails.

Maybe I'm just careless and made a mistake, but I have no idea.

Following your guidance, it still faild...

The error is caused by " vendor chip initialization failed"?

Is this a hardware failure?

log is following

Reconnected to existing LinkServer process.
============= SCRIPT: RT1170_connect_M7_wake_M4.scp =============
RT1170 Connect M7 and Wake M4 Script
DpID = 6BA02477
APID = 0x84770001
Setting M4 spin code
Setting M4 clock
Resetting M4 core
Releasing M4
View cores on the DAP AP
DpID = 6BA02477
TAP 0: 6BA02477 Core 0: M7  APID: 84770001 ROM Table: E00FD003*
TAP 0: 6BA02477 Core 1: M4  APID: 24770011 ROM Table: E00FF003
============= END SCRIPT ========================================
Probe Firmware: CMSIS-DAP (ARM)
Serial Number:  02440000352e1b8600000000000000000000000097969905
VID:PID:  0D28:0204
USB Path: \\?\hid#vid_0d28&pid_0204&mi_03#8&1af57743&0&0000#{4d1e55b2-f16f-11cf-88cb-001111000030}
Using memory from core 0 after searching for a good core
debug interface type      = CoreSight DP (DAP DP ID 6BA02477) over SWD TAP 0
processor type            = Cortex-M7 (CPU ID 00000C27) on DAP AP 0
number of h/w breakpoints = 8
number of flash patches   = 0
number of h/w watchpoints = 4
Probe(0): Connected&Reset. DpID: 6BA02477. CpuID: 00000C27. Info: <None>
Debug protocol: SWD. RTCK: Disabled. Vector catch: Disabled.
Content of CoreSight Debug ROM(s):
RBASE E00FD000: CID B105100D PID 000008E88C ROM (type 0x1)
ROM 1 E00FE000: CID B105100D PID 04000BB4C8 ROM (type 0x1)
ROM 2 E00FF000: CID B105100D PID 04000BB4C7 ROM (type 0x1)
ROM 3 E000E000: CID B105E00D PID 04000BB00C Gen SCS (type 0x0)
ROM 3 E0001000: CID B105E00D PID 04000BB002 Gen DWT (type 0x0)
ROM 3 E0002000: CID B105E00D PID 04000BB00E Gen (type 0x0)
ROM 3 E0000000: CID B105E00D PID 04000BB001 Gen ITM (type 0x0)
ROM 2 E0041000: CID B105900D PID 04001BB975 CSt ARM ETMv4.0 type 0x13 Trace Source - Core
ROM 2 E0042000: CID B105900D PID 04004BB906 CSt type 0x14 Debug Control - Trigger, e.g. ECT
ROM 1 E0043000: CID B105900D PID 04001BB908 CSt CSTF type 0x12 Trace Link - Trace funnel/router
NXP: MIMXRT1176xxxxx
DAP stride is 1024 bytes (256 words)
Inspected v.2 External Flash Device on SPI using SFDP JEDEC ID MIMXRT1170_SFDP_MXIC_OPI.cfx
Image 'iMXRT1170_SFDP_FlexSPI1_MXIC_OPI Apr  5 2024 18:35:51'
Opening flash driver MIMXRT1170_SFDP_MXIC_OPI.cfx
Sending VECTRESET to run flash driver
request to clear DAP error failed - status 5
After error Nn(05). Wire ACK Fault in DAP access -
Failed to read address register in DAP - Nn(05). Wire ACK Fault in DAP access
flash driver polled mailbox (8 bytes at 0x2000A7D8) read failed (on poll 1/301) - retrying after 1ms - rc Em(17). Debug port inaccessible after access at location 0x2000A7D8
request to clear DAP error failed - status 5
After error Nn(05). Wire ACK Fault in DAP access -
Failed to read address register in DAP - Nn(05). Wire ACK Fault in DAP access
flash driver polled mailbox (8 bytes at 0x2000A7D8) read failed (on poll 1/301) - halting for postmortem - rc Em(17). Debug port inaccessible after access at location 0x2000A7D8
failed to halt target for postmortem - rc Nn(05). Wire ACK Fault in DAP access
request to clear DAP error failed - status 5
failed to read registers - Nn(05). Wire ACK Fault in DAP access
Flash Driver V.2 startup failed - rc Em(17). Debug port inaccessible after access at location 0x2000A7D8
chip initialization failed - Em(17). Debug port inaccessible after access at location 0x2000A7D8
failed to initialize flash driver MIMXRT1170_SFDP_MXIC_OPI.cfx
request to clear DAP error failed - status 5
request to clear DAP error failed - status 5
error closing down debug session - Nn(05). Wire ACK Fault in DAP access

rt1170 evk demo board enable octal flash

rt1170 evk demo board enable octal flash

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