I have been trying to configure the FlexSPI pins of the iMxRT117x processor using the MCU IDE tool.
I am using the Pin cofig tool within the IDE to configure the pins. When I configured the GPIO_SD_B2_07 for FLEXSPI1_A_CLK. I expect the code to be generated with the PIN mux value of 1 as per the reference manual. But it generates as below:
IOMUXC_SetPinMux(
IOMUXC_GPIO_SD_B2_07_FLEXSPI1_A_SCLK, 0U); /* GPIO_SD_B2_07 is configured as FLEXSPI1_A_SCLK */
This looks contradicting.
已解决! 转到解答。
Hi Jaivarthan,
If you browse to the definition of IOMUXC_GPIO_SD_B2_07_FLEXSPI1_A_SCLK, you will see that it is defined as 5 values. The second of these values should be a '0x1U' as indicated in the Reference Manual.
For example, in one of my RT1052 projects, this is how FlexSPI clock is defined:
#define IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK 0x401F81F0U, 0x1U, 0x401F84C8U, 0x0U, 0x401F83E0U
jaredm
Hi Jaivarthan,
If you browse to the definition of IOMUXC_GPIO_SD_B2_07_FLEXSPI1_A_SCLK, you will see that it is defined as 5 values. The second of these values should be a '0x1U' as indicated in the Reference Manual.
For example, in one of my RT1052 projects, this is how FlexSPI clock is defined:
#define IOMUXC_GPIO_SD_B1_07_FLEXSPIA_SCLK 0x401F81F0U, 0x1U, 0x401F84C8U, 0x0U, 0x401F83E0U
jaredm
Hi @jaredm
Thank you for your reply.
I see now the it is defined as below and has FlexSPI CLK pin configured in the config register by default even though I donot specifically configure it via the tool.
#define IOMUXC_GPIO_SD_B2_07_FLEXSPI1_A_SCLK 0x400E81D0U, 0x1U, 0x400E8574U, 0x1U, 0x400E8414U
Thanks,
Jai