FAQs
English (US) 日本語 | Japanese 中文 | Chinese (Simplified)

J-Link failing to (re)program HyperFlash on RT1050 EVK

cancel
Turn on suggestions
Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.
Showing results for 
Show  only  | Search instead for 
Did you mean: 

J-Link failing to (re)program HyperFlash on RT1050 EVK

‎12-20-2017 02:56 PM
4,606 Views
ryanshuttlewort
Contributor IV

Hello I am using MCUXpresso IDE, version v10.1.0 [Build 589] [2017-11-14] with an MIMXRT1050-EVK SDK, version  2.3.0 (2017-11-16).  I am finding that I can only occasionally (re)program HyperFlash via J-Link, see "Verify failed" in the dump below.  When this happens I've had to resort to bulk erasing and then re-programming via the OpenSDA interface which will not be an option in our final product given that it will have J-Link only. 

Any suggestions as why this might be happening and how to avoid it would be appreciated.

Thanks.

[20-12-2017 01:39:48] Executing Server: /opt/SEGGER/JLink_V620g/JLinkGDBServer  -nosilent -swoport 2332 -select USB=600100461 -telnetport 2333 -singlerun -endian little -noir -speed auto   -port 2331  -vd -device MCIMXRT1052 -if SWD  -halt -reportuseraction
SEGGER J-Link GDB Server V6.20g Command Line Version

JLinkARM.dll V6.20g (DLL compiled Oct 20 2017 17:09:36)

Command line: -nosilent -swoport 2332 -select USB=600100461 -telnetport 2333 -singlerun -endian little -noir -speed auto -port 2331 -vd -device MCIMXRT1052 -if SWD -halt -reportuseraction
-----GDB Server start settings-----
GDBInit file:                  none
GDB Server Listening port:     2331
SWO raw output listening port: 2332
Terminal I/O port:             2333
Accept remote connection:      yes
Generate logfile:              off
Verify download:               on
Init regs on start:            off
Silent mode:                   off
Single run mode:               on
Target connection timeout:     0 ms
------J-Link related settings------
J-Link Host interface:         USB
J-Link script:                 none
J-Link settings file:          none
------Target related settings------
Target device:                 MCIMXRT1052
Target interface:              SWD
Target interface speed:        auto
Target endian:                 little

Connecting to J-Link...
J-Link is connected.
Device "MCIMXRT1052" selected.
Firmware: J-Link V10 compiled Dec  7 2017 11:13:46
Hardware: V10.10
S/N: 600100461
Feature(s): RDI, FlashBP, FlashDL, JFlash, GDB
Checking target voltage...
Target voltage: 3.32 V
Listening on TCP/IP port 2331
Connecting to target...Found SW-DP with ID 0x0BD11477
Scanning AP map to find all available APs
AP[1]: Stopped AP scan as end of AP map has been reached
AP[0]: AHB-AP (IDR: 0x04770041)
Iterating through AP map to find AHB-AP to use
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS
ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB
ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM
ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 ETB
ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU
ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG
Cache: Separate I- and D-cache.

I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Found SW-DP with ID 0x0BD11477
AP map detection skipped. User manually configured AP map.
AP[0]: AHB-AP (IDR: Not set)
AP[0]: Core found
AP[0]: AHB-AP ROM base: 0xE00FD000
CPUID register: 0x411FC271. Implementer code: 0x41 (ARM)
Found Cortex-M7 r1p1, Little endian.
FPUnit: 8 code (BP) slots and 0 literal slots
CoreSight components:
ROMTbl[0] @ E00FD000
ROMTbl[0][0]: E00FE000, CID: B105100D, PID: 000BB4C8 ROM Table
ROMTbl[1] @ E00FE000
ROMTbl[1][0]: E00FF000, CID: B105100D, PID: 000BB4C7 ROM Table
ROMTbl[2] @ E00FF000
ROMTbl[2][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS
ROMTbl[2][1]: E0001000, CID: B105E00D, PID: 000BB002 DWT
ROMTbl[2][2]: E0002000, CID: B105E00D, PID: 000BB00E FPB
ROMTbl[2][3]: E0000000, CID: B105E00D, PID: 000BB001 ITM
ROMTbl[1][1]: E0041000, CID: B105900D, PID: 001BB975 ETM
ROMTbl[1][2]: E0042000, CID: B105900D, PID: 004BB906 ETB
ROMTbl[0][1]: E0040000, CID: B105900D, PID: 000BB9A9 TPIU
ROMTbl[0][2]: E0043000, CID: B105F00D, PID: 001BB101 TSG
Cache: Separate I- and D-cache.

I-Cache L1: 32 KB, 512 Sets, 32 Bytes/Line, 2-Way
D-Cache L1: 32 KB, 256 Sets, 32 Bytes/Line, 4-Way
Connected to target
Waiting for GDB connection...Connected to 127.0.0.1
Reading all registers
Read 4 bytes @ address 0x60007C84 (Data = 0x3380F403)
Reading 64 bytes @ address 0x20000A40
Read 4 bytes @ address 0x600025F6 (Data = 0xE0026178)
Reading 8 bytes @ address 0x20000AAF
Reading 64 bytes @ address 0x20000A00
Reading 8 bytes @ address 0x20000AAF
Received monitor command: reset
Reset: Halt core after reset via DEMCR.VC_CORERESET.
Reset: Reset device via AIRCR.SYSRESETREQ.
Resetting target
Downloading 8192 bytes @ address 0x60000000 - Verify failed
Downloading 16112 bytes @ address 0x60002000 - Verify failed
Downloading 16144 bytes @ address 0x60005EF0 - Verify failed
Downloading 11304 bytes @ address 0x60009E00 - Verify failed
Downloading 8 bytes @ address 0x6000CA28 - Verify failed
Writing register (PC = 0x60002340)
Read 4 bytes @ address 0x60002340 (Data = 0xA7EB3921)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Reading all registers
Read 4 bytes @ address 0x60002340 (Data = 0xA7EB3921)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Read 2 bytes @ address 0x60003F02 (Data = 0xA7EB)
Received monitor command: semihosting enable
Semi-hosting enabled (Handle on BKPT)
Received monitor command: exec SetRestartOnClose=1
Executed SetRestartOnClose=1
Setting breakpoint @ address 0x60003F02, Size = 2, BPHandle = 0x0001
Starting target CPU...
...Breakpoint reached @ address 0x60003F02
Reading all registers
Read 4 bytes @ address 0x60003F02 (Data = 0x5D20A7EB)
Removing breakpoint @ address 0x60003F02, Size = 2
GDB closed TCP/IP connection
Restoring target state and closing J-Link connection...
Shutting down...

Server has been shut down.‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍
Reply
10 Replies

‎02-01-2018 03:09 PM
2,786 Views
lpcxpresso_supp
NXP Employee
NXP Employee

We're of the understanding Segger is already working on RT1050 flash support.

Thanks and regards,

MCUXpresso Support

0 Kudos
Reply

‎02-08-2018 06:21 PM
2,785 Views
srinivas_chilaka
NXP Employee
NXP Employee

Please let me know when it will be ready? Do we have timeline for it?

0 Kudos
Reply

‎04-24-2018 12:18 AM
2,785 Views
GottiLuca
Contributor IV

Seggere has just added support for both HyperFlash and QSPI .

I've personally tested with my Segger JLink on the EVK1050 with HyperFlash and it runs correctly.

See : Release notes for the J-Link Software and Documentation Pack  

( Version V6.32 (2018-04-20))

Reply

‎01-04-2018 04:47 AM
2,785 Views
lpcxpresso_supp
NXP Employee
NXP Employee

From the point of view of flash programming, the on board OpenSDA debug probe can have the same capabilities as an external debug probe (albeit likely the OpenSDA variant will program more slowly).


These capabilities however are determined by the firmware type (which determines which debug solution LinkServer, P&E or SEGGER). So:

OpenSDA programmed with JLink firmware can have the same capabilities as an external J-Link probe

OpenSDA programmed with DAP-Link will have the same capabilities as an LPC-Link2 (programmed with CMSIS-DAP/LinkServer) firmware etc.

Note: external debug probes may have many more features/improvements but these will not change whether flash programming is supported (unless

Note also: LPC-Link2 can be programmed with SEGGER J-Link firmware, in which case it will have the capabilities of SEGGER's debug solution.

The above is a general statement, and excludes advanced debug features or artificial restrictions that could potentially be included.

Yours,

MCUXpresso Support

0 Kudos
Reply

‎02-01-2018 12:49 PM
2,786 Views
craigsmith
Contributor III

Hi MCUXpresso IDE Support,

I am also trying to get the JLink working with the RT1050 series external flash.

Is there any project in the works at NXP to create/release a Flash Loader for J-Link for the RT1050 devices? From reading the Segger JLink documention (Chapter 10, UM08001 JLink Manual and Adding Support for New Devices - SEGGER - Support Wiki ) it seems it is possible for NXP to create this flash loader (possibly just by modifying the existing MCPXpresso cfx flash loader) and submit to Segger for inclusion in their driver.

thanks,

Craig

0 Kudos
Reply

‎12-22-2017 05:28 AM
2,785 Views
lpcxpresso_supp
NXP Employee
NXP Employee

Hi Ryan,

I do not believe SEGGER J-Link currently supports programming the Hyperflash within the RT1050, rather it treats this memory region as RAM and so the write fails to verify.  If a flash operation were being performed you would see something similar to below within the log:

...
Resetting target
Downloading 13744 bytes @ address 0x60000000 - Verified OK
Downloading 12 bytes @ address 0x600035B0 - Verified OK
J-Link: Flash download: Bank 0 @ 0x60000000: 1 range affected (16384 bytes)
J-Link: Flash download: Total time needed: 0.211s (Prepare: 0.026s, Compare: 0.005s, Erase: 0.025s, Program: 0.147s, Verify: 0.000s, Restore: 0.004s)

When they do however, MCUXPresso IDE can be switched to a newly installed J-Link version via:

Preferences -> MCUXpresso IDE -> J-Link Options -> Restore Defaults

This will force a scan for installed versions and an update to the base version to use.

Yours,

MCUXpresso IDE Support

Reply

‎12-22-2017 09:06 AM
2,786 Views
ryanshuttlewort
Contributor IV

So just to be very clear.  Are the OpenSDA interface and the MfgTool the only way to program HyperFlash and QSPI Flash or would the LCP-Link in the previous suggestion also work?

Thanks.

0 Kudos
Reply

‎12-22-2017 08:55 AM
2,786 Views
ryanshuttlewort
Contributor IV

Ok, thanks.  I think I was getting confused by a previous hello_world_xip application programmed via OpenSDA.  The J0Link went through the motions of programming and verified memory correctly because the image was the same as that already in memory.

0 Kudos
Reply

‎12-21-2017 12:14 AM
2,786 Views
BlackNight
NXP Employee
NXP Employee

Hi Ryan,

Not sure what this is causing, but maybe you can enable/post the GDB traces (see Board Bring-Up Tips, GDB Logs and Traces in Eclipse | MCU on Eclipse)?

As for erasing the Hyperflash: If you don't have the OpenSDA (aka DAPLink), then you could use the LPC-Link2 instead. I have used it that way sucessfully with my board (see MCUXpresso IDE V10.1.0 with i.MX RT1052 Crossover Processor | MCU on Eclipse ). The LPC-Link2 is $20 only (LPC-Link2|NXP ) it it is always good to have one at hand.

I hope this helps,

Erich

Reply

‎12-21-2017 07:25 AM
2,787 Views
ryanshuttlewort
Contributor IV

Thanks Erich, I had seen the LPC-Link mentioned but wasn't quite sure were it fit in.

0 Kudos
Reply