Watchdog status register not updating

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 

Watchdog status register not updating

1,046 次查看
winstonjacob
Contributor IV

I am working on LS1021atwr reference board, and I am checking watchdog status register(Reset Request Mask Register (DCFG_CCSR_RSTRQMR1), Reset Request Status Register (DCFG_CCSR_RSTRQSR1), Watchdog Reset Status Register (WDOG1_WRSR)) in u-boot section, but whenever watchdog reset is happening, the corresponding watchdog status registers are not updating(It will differentiate whether it is Power on reset/Watchdog reset), Can anybody help us to solve this issue.

 

 

 

 

标签 (1)
0 项奖励
3 回复数

1,044 次查看
ufedor
NXP Employee
NXP Employee

Please refer to the QorIQ LS1021A Reference Manual, 12.3.14 Reset Request Status Register (DCFG_CCSR_RSTRQSR1), where in the register description diagram it is shown that reset value is all zeroes - i.e. the register does not retain data during reset.

Please consider that upon RESET_REQ_B assertion the register value has to be inspected by an external device (CPLD/FPGA) before asserting PORESET_B in response.

0 项奖励

1,028 次查看
winstonjacob
Contributor IV

I think, that can be verified in kernel. but I need it in u-boot. My requirement is, I have to update firmware, if it is watchdog reset. Firmware should not be updated if it is power on reset. So I needs to differentiate both the resets in u-boot. How can we differentiate both the resets in u-boot?

0 项奖励

1,017 次查看
ufedor
NXP Employee
NXP Employee

This could be done by means of external CPLD/FPGA.

0 项奖励