Dear WANG,My custom ls1043ads board, one PHY RTL8211B connected to EC2 through GMAC2, one microchip LAN8814 connected to serdes using QSGMII0, I want to know how I should modify the kernel to make it work properly in rootfs? Looking forward to your reply, the final kick.The complete log is attached.
Wang, Thank you very much for your support. After checking, because we used RGMII2, we did not connect the EC1_GTX_CLK125 clock source used by the CPU by default, so RGMI2_TX_CLK could not work properly. At present, it has been pinged through, and the hardware flight line test is indeed the problem.However, packet loss may occur.
However, the most important our qsgmii is still not working properly, do I need to open a new topic?
Wang,Thank you very much for your prompt reply.But it still does not work completely. I will provide more relevant information in the attachment for your reference. Looking forward to your reply, thank you.
Wang, I'm sorry to tell you that the debugging still hasn't been done, but when I pulled down rgmii in ramdisk, no errors related to phy were reported, and QSGMII didn't seem to have any changes. What I want to know is whether my QSGMII should enable 4 network ports instead of one, because I connected lan8814 with 4 network ports. In the attachment, I submitted the content of the latest device tree that I want to try.
Because I use EC2, as you say, I should check the/sys/bus/mdio_bus/devices / 0 x0000000001afc000:02 /. But the driver of rgmii is not displayed correctly, I asked for rtl8211B, qsgmii does not display the driver at all.
Wang,Thank you for your patient support. Last night, I found that the configuration of dts about rgmii was different from my schematic diagram (mdio1-- QSGMII mdio2-- RGMII). Now it has been modified, the driver can be recognized and the link can be normal, but the computer directly connected to ping cannot be pinged.
I want to know if I need to configure the value of PHY RTL8211F tx/rx delay in the phy register. I have just tried the attributes phy-connection-type = "rgmii" and phy-connection-type = "rgmii-id", but nothing has changed.
Also, I don't know if this tip is useful information.
Trying as you suggested still failed, because my firewall has been down for a long time due to debugging, and I can ping through other device network ports. On the issue of phy address, since I only used one phy, my schematic design also set it to 1, the reason the reference board is phy address 2 is to distinguish between the two PhYs. rgmii-id reads rx/tx delay from phy, so I suspect there is a problem here.
In addition, I have heard before that there is a bug in the recognition interface type rgmii or rgmii-id in the previous version of the kernel.
Wang, Thank you very much for your support. After checking, because we used RGMII2, we did not connect the EC1_GTX_CLK125 clock source used by the CPU by default, so RGMI2_TX_CLK could not work properly. At present, it has been pinged through, and the hardware flight line test is indeed the problem.However, packet loss may occur.
However, the most important our qsgmii is still not working properly, do I need to open a new topic?
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