Hi all,
I'm using LS2085A QDS Board for development, in this USB 3.0 port is there, but that is not getting detected when i insert a pendrive in that.. I checked that in u-boot as well as in kernel. I checked with all the usb commands available in u-boot and also checked the dmesg in kernel.. inserted and removed the pendrive continuously but there is no entries in dmesg.. Please help me to make it working..
Solved! Go to Solution.
Hello Anandha Kumar M,
USB 3.0 is supported since 20150515 release.
There are two USB ports on LS2085QDS, please use USB1 to do USB 3.0 verification.
About RCW, please refer to field RCW[USB] and RCW[USB3_CLK_FSEL], the default RCW provided in the SDK ISO is fine.
The following is USB 3.0 test log in u-boot with SanDisk USB 3.0 storage device.
U-Boot 2015.01Layerscape2-SDK+g551206e (Apr 04 2015 - 14:20:34)
SoC: LS2085E (0x87010010)
Clock Configuration:
CPU0(A57):1600 MHz CPU1(A57):1600 MHz CPU2(A57):1600 MHz
CPU3(A57):1600 MHz CPU4(A57):1600 MHz CPU5(A57):1600 MHz
CPU6(A57):1600 MHz CPU7(A57):1600 MHz
Bus: 600 MHz DDR: 1333.333 MHz DP-DDR: 1333.333 MHz
Reset Configuration Word (RCW):
00: 40282830 40400040 00000000 00000000
10: 00000000 00200000 00200000 00000000
20: 00c12980 00002580 00000000 00000000
30: 00000e0b 00000000 00000000 00000000
40: 00000000 00000000 00000000 00000000
50: 00000000 00000000 00000000 00000000
60: 00000000 00000000 00027000 00000000
70: 492a0000 00000000 00000000 00000000
Board: LS2085E-QDS, Board Arch: V1, Board version: B, boot from vBank: 4
FPGA: v7 (LS2085AQDS_2015_0407_1232), build 169 on Tue Apr 07 16:32:55 2015
SERDES1 Reference : Clock1 = 156.25MHz Clock2 = 156.25MHz
SERDES2 Reference : Clock1 = 100 separate SSCGMHz Clock2 = 100 separate SSCGMHz
I2C: ready
DRAM: Initializing DDR....using SPD
Detected UDIMM 18ASF1G72AZ-2G1A1
Detected UDIMM 18ASF1G72AZ-2G1A1
DP-DDR: Detected UDIMM 18ASF1G72AZ-2G1A1
19.5 GiB
DDR 15.5 GiB (DDR4, 64-bit, CL=9, ECC on)
DDR Controller Interleaving Mode: 256B
DDR Chip-Select Interleaving Mode: CS0+CS1
DP-DDR 4 GiB (DDR4, 32-bit, CL=9, ECC on)
DDR Chip-Select Interleaving Mode: CS0+CS1
Waking secondary cores to start from fff18000
All (8) cores are up.
Using SERDES1 Protocol: 42 (0x2a)
Using SERDES2 Protocol: 73 (0x49)
Flash: 128 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
EEPROM: NXID v1
PCIe1: disabled
PCIe2: disabled
PCIe3: disabled
PCIe4: Root Complex x1 gen1, regs @ 0x3700000
01:00.0 - 8086:107d - Network controller
PCIe4: Bus 00 - 01
In: serial
Out: serial
Err: serial
Target spinup took 0 ms.
AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
flags: 64bit ncq pm clo only pmp fbss pio slum part ccc apst
Found 1 device(s).
SCSI: Net: qds: WRIOP: Supported SerDes Protocol 0x2a
qds: WRIOP: Supported SerDes Protocol 0x49
mdio_register: non unique device name 'FSL_MDIO1'
Phy 28 not found
PHY reset timed out
Phy 29 not found
PHY reset timed out
Phy 30 not found
PHY reset timed out
Phy 31 not found
PHY reset timed out
crc32+
fsl-mc: Booting Management Complex ... SUCCESS
fsl-mc: Management Complex booted (version: 6.0.4, boot status: 0x1)
fsl-mc: Deploying data path layout ... SUCCESS
e1000: 00:15:17:8e:7e:05
DPNI1, DPNI3, e1000#0 [PRIME]
Warning: e1000#0 MAC addresses don't match:
Address in SROM is 00:15:17:8e:7e:05
Address in environment is 00:e0:0c:00:7a:02
=>
=> usb start
(Re)start USB...
USB0: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 2 USB Device(s) found
USB1: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 1 for devices... 1 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usb reset
(Re)start USB...
USB0: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 2 USB Device(s) found
USB1: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 1 for devices... 1 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (5 Gb/s, 0mA)
| u-boot XHCI Host Controller
|
+-2 Mass Storage (5 Gb/s, 224mA)
SanDisk Ultra Fit 4C531123641015104115
3 Hub (5 Gb/s, 0mA)
u-boot XHCI Host Controller
=> usb info
1: Hub, USB Revision 3.0
- u-boot XHCI Host Controller
- Class: Hub
- PacketSize: 9 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms
2: Mass Storage, USB Revision 3.0
- SanDisk Ultra Fit 4C531123641015104115
- Class: (from Interface) Mass Storage
- PacketSize: 9 Configurations: 1
- Vendor: 0x0781 Product 0x5583 Version 1.0
Configuration: 1
- Interfaces: 1 Bus Powered 224mA
Interface: 0
- Alternate Setting 0, Endpoints: 2
- Class Mass Storage, Transp. SCSI, Bulk only
- Endpoint 1 In Bulk MaxPacket 1024
- Endpoint 2 Out Bulk MaxPacket 1024
3: Hub, USB Revision 3.0
- u-boot XHCI Host Controller
- Class: Hub
- PacketSize: 9 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms
=> usb storage
Device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra Fit
Type: Removable Hard Disk
Capacity: 30550.0 MB = 29.8 GB (62566488 x 512)
=> usb dev
USB device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra Fit
Type: Removable Hard Disk
Capacity: 30550.0 MB = 29.8 GB (62566488 x 512)
=> usb write a0000000 0 800
USB write: device 0 block # 0, count 2048 ... 2048 blocks write: OK
=> usb read b0000000 0 800
USB read: device 0 block # 0, count 2048 ... 2048 blocks read: OK
=> cmp.b a0000000 b0000000 100000
Total of 1048576 byte(s) were the same
=>
The attached is the Linux Kernel log.
If your problem remains, would you please also provide your u-boot log?
Have a great day,
Yiping
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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Hello Anandha Kumar M,
USB 3.0 is supported since 20150515 release.
There are two USB ports on LS2085QDS, please use USB1 to do USB 3.0 verification.
About RCW, please refer to field RCW[USB] and RCW[USB3_CLK_FSEL], the default RCW provided in the SDK ISO is fine.
The following is USB 3.0 test log in u-boot with SanDisk USB 3.0 storage device.
U-Boot 2015.01Layerscape2-SDK+g551206e (Apr 04 2015 - 14:20:34)
SoC: LS2085E (0x87010010)
Clock Configuration:
CPU0(A57):1600 MHz CPU1(A57):1600 MHz CPU2(A57):1600 MHz
CPU3(A57):1600 MHz CPU4(A57):1600 MHz CPU5(A57):1600 MHz
CPU6(A57):1600 MHz CPU7(A57):1600 MHz
Bus: 600 MHz DDR: 1333.333 MHz DP-DDR: 1333.333 MHz
Reset Configuration Word (RCW):
00: 40282830 40400040 00000000 00000000
10: 00000000 00200000 00200000 00000000
20: 00c12980 00002580 00000000 00000000
30: 00000e0b 00000000 00000000 00000000
40: 00000000 00000000 00000000 00000000
50: 00000000 00000000 00000000 00000000
60: 00000000 00000000 00027000 00000000
70: 492a0000 00000000 00000000 00000000
Board: LS2085E-QDS, Board Arch: V1, Board version: B, boot from vBank: 4
FPGA: v7 (LS2085AQDS_2015_0407_1232), build 169 on Tue Apr 07 16:32:55 2015
SERDES1 Reference : Clock1 = 156.25MHz Clock2 = 156.25MHz
SERDES2 Reference : Clock1 = 100 separate SSCGMHz Clock2 = 100 separate SSCGMHz
I2C: ready
DRAM: Initializing DDR....using SPD
Detected UDIMM 18ASF1G72AZ-2G1A1
Detected UDIMM 18ASF1G72AZ-2G1A1
DP-DDR: Detected UDIMM 18ASF1G72AZ-2G1A1
19.5 GiB
DDR 15.5 GiB (DDR4, 64-bit, CL=9, ECC on)
DDR Controller Interleaving Mode: 256B
DDR Chip-Select Interleaving Mode: CS0+CS1
DP-DDR 4 GiB (DDR4, 32-bit, CL=9, ECC on)
DDR Chip-Select Interleaving Mode: CS0+CS1
Waking secondary cores to start from fff18000
All (8) cores are up.
Using SERDES1 Protocol: 42 (0x2a)
Using SERDES2 Protocol: 73 (0x49)
Flash: 128 MiB
NAND: 512 MiB
MMC: FSL_SDHC: 0
EEPROM: NXID v1
PCIe1: disabled
PCIe2: disabled
PCIe3: disabled
PCIe4: Root Complex x1 gen1, regs @ 0x3700000
01:00.0 - 8086:107d - Network controller
PCIe4: Bus 00 - 01
In: serial
Out: serial
Err: serial
Target spinup took 0 ms.
AHCI 0001.0301 32 slots 1 ports 6 Gbps 0x1 impl SATA mode
flags: 64bit ncq pm clo only pmp fbss pio slum part ccc apst
Found 1 device(s).
SCSI: Net: qds: WRIOP: Supported SerDes Protocol 0x2a
qds: WRIOP: Supported SerDes Protocol 0x49
mdio_register: non unique device name 'FSL_MDIO1'
Phy 28 not found
PHY reset timed out
Phy 29 not found
PHY reset timed out
Phy 30 not found
PHY reset timed out
Phy 31 not found
PHY reset timed out
crc32+
fsl-mc: Booting Management Complex ... SUCCESS
fsl-mc: Management Complex booted (version: 6.0.4, boot status: 0x1)
fsl-mc: Deploying data path layout ... SUCCESS
e1000: 00:15:17:8e:7e:05
DPNI1, DPNI3, e1000#0 [PRIME]
Warning: e1000#0 MAC addresses don't match:
Address in SROM is 00:15:17:8e:7e:05
Address in environment is 00:e0:0c:00:7a:02
=>
=> usb start
(Re)start USB...
USB0: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 2 USB Device(s) found
USB1: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 1 for devices... 1 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usb reset
(Re)start USB...
USB0: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 0 for devices... 2 USB Device(s) found
USB1: Register 200017f NbrPorts 2
Starting the controller
USB XHCI 1.00
scanning bus 1 for devices... 1 USB Device(s) found
scanning usb for storage devices... 1 Storage Device(s) found
=> usb tree
USB device tree:
1 Hub (5 Gb/s, 0mA)
| u-boot XHCI Host Controller
|
+-2 Mass Storage (5 Gb/s, 224mA)
SanDisk Ultra Fit 4C531123641015104115
3 Hub (5 Gb/s, 0mA)
u-boot XHCI Host Controller
=> usb info
1: Hub, USB Revision 3.0
- u-boot XHCI Host Controller
- Class: Hub
- PacketSize: 9 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms
2: Mass Storage, USB Revision 3.0
- SanDisk Ultra Fit 4C531123641015104115
- Class: (from Interface) Mass Storage
- PacketSize: 9 Configurations: 1
- Vendor: 0x0781 Product 0x5583 Version 1.0
Configuration: 1
- Interfaces: 1 Bus Powered 224mA
Interface: 0
- Alternate Setting 0, Endpoints: 2
- Class Mass Storage, Transp. SCSI, Bulk only
- Endpoint 1 In Bulk MaxPacket 1024
- Endpoint 2 Out Bulk MaxPacket 1024
3: Hub, USB Revision 3.0
- u-boot XHCI Host Controller
- Class: Hub
- PacketSize: 9 Configurations: 1
- Vendor: 0x0000 Product 0x0000 Version 1.0
Configuration: 1
- Interfaces: 1 Self Powered 0mA
Interface: 0
- Alternate Setting 0, Endpoints: 1
- Class Hub
- Endpoint 1 In Interrupt MaxPacket 8 Interval 255ms
=> usb storage
Device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra Fit
Type: Removable Hard Disk
Capacity: 30550.0 MB = 29.8 GB (62566488 x 512)
=> usb dev
USB device 0: Vendor: SanDisk Rev: 1.00 Prod: Ultra Fit
Type: Removable Hard Disk
Capacity: 30550.0 MB = 29.8 GB (62566488 x 512)
=> usb write a0000000 0 800
USB write: device 0 block # 0, count 2048 ... 2048 blocks write: OK
=> usb read b0000000 0 800
USB read: device 0 block # 0, count 2048 ... 2048 blocks read: OK
=> cmp.b a0000000 b0000000 100000
Total of 1048576 byte(s) were the same
=>
The attached is the Linux Kernel log.
If your problem remains, would you please also provide your u-boot log?
Have a great day,
Yiping
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Hi Yiping,
Can u please provide the uboot image u have used for this usb testing ? so that i will also use the same uboot and test the same..
Thanks
Anandh..
Hi Yiping,
Actually we have the same settings in RCW[USB] and RCW[USB3_CLK_FSEL]. I didnt change that one, Anyway i will check one more time and update u..
--
Thanks
Anandh