BL2 run next image failed

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BL2 run next image failed

1,019 Views
ainolike
Contributor III

Hi, I'm testing lsdk2012 atf code on LS1028. BL2 has loaded BL31 and U-Boot image successfully, while there is no more print info when BL2 calls bl2_run_next_image. The print info as following:

NOTICE:  4GB DDR4, 32-bit, CL=11, ECC off

INFO:    Time used by DDR driver 18 ms

NOTICE: BL2: v1.5(release):LSDK-20.12-dirty

NOTICE: BL2:Build: 07:50:34, Feb 18 2021

INFO:   Configuration TrustZone Controller

INFO:   Value of region base = ffe00000

INFO:   Value of region base = 1ffe00000

INFO:   Value of region base = fbe00000

INFO:   Value of region base = 2180000000

INFO:   BL2: Doing paltform setup

INFO:   BL2: Loading image id 3

INFO:   Loading image id=3 at address 0xfbe00000

INFO:   Image id=3 loaded: 0xfbe00000 - 0xfbe0a169

INFO:   BL2: Loading image id 5

INFO:   Loading image id=5 at address 0x82000000

INFO:   Image id=5 loaded: 0x82000000 - 0x820b4477

NOTICE:  BL2: Booting BL31

INFO:    Entry point address = 0xfbe00000

INFO:    SPSR = 0x3cd

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2 Replies
Moved:

969 Views
bpe
NXP Employee
NXP Employee
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968 Views
bpe
NXP Employee
NXP Employee

DDR initialization is a key step at BL2  stage that later boot stages
and the OS rely on. Making sure it creates a reliable DDR memory configuration is essential for the rest of the boot process. You can find advanced information
on DDR ATF driver in L SDK User Guide, Section 5.2.1.1. The document can be downloaded by following this link. DDR settings are specific to the board and
used memory chips, thus no universal settings can be provided. My suggestion in
regards to the described issue is to use the DDR tool from QCVS software suite
to setup and verify your configuration before you proceed with debugging of the
rest of the boot code.

I'm also moving your recent inquiry about caslat_x to a new thread to be
followed by another engineer with expertise in DDR memory hardware. If you have
more questions specifically about ATF or ATF debugging, please feel free to update this thread.

For questions that are more DDR memory related and specific LS1028A DDR controller
initialization, please post in the new thread.

Best Regards,
Platon.

 

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