LPC_SCT->MATCHREL[0].U = SystemCoreClock/100; // match 0 @ 100 Hz = 10 msec |
LPC_SCT->MATCHREL[0].U = (SystemCoreClock/100)-1; // match 0 @ 100 Hz = 10 msec |
why?
Set the corresponding event bit in the LIMIT register for the event to set an upper
limit for the counter.
When a limit event occurs in unidirectional mode, the counter is cleared to zero
and begins counting up on the next clock edge.
When a limit event occurs in bidirectional mode, the counter begins to count down
from the current value on the next clock edge.
if SystemCoreClock = 10MHz,when it is 10000000,clear to zero,next clock edge it is 1,so it realy is 1 to 9999999?