/** * @brief UART register block structure */ typedef struct { __IO uint32_t CFG;/*!< Configuration register */ __IO uint32_t CTRL;/*!< Control register */ __IO uint32_t STAT;/*!< Status register */ __IO uint32_t INTENSET;/*!< Interrupt Enable read and set register */ __O uint32_t INTENCLR;/*!< Interrupt Enable clear register */ __I uint32_t RXDATA;/*!< Receive Data register */ __I uint32_t RXDATA_STAT;/*!< Receive Data with status register */ __IO uint32_t TXDATA;/*!< Transmit data register */ __IO uint32_t BRG;/*!< Baud Rate Generator register */ __IO uint32_t INTSTAT;/*!< Interrupt status register */ } LPC_USART_T; |
** * @brief UART register block structure */ typedef struct { __IO uint32_t CFG;/*!< Configuration register */ __IO uint32_t CTRL;/*!< Control register */ __IO uint32_t STAT;/*!< Status register */ __IO uint32_t INTENSET;/*!< Interrupt Enable read and set register */ __O uint32_t INTENCLR;/*!< Interrupt Enable clear register */ __I uint32_t RXDATA;/*!< Receive Data register */ __I uint32_t RXDATA_STAT;/*!< Receive Data with status register */ __IO uint32_t TXDATA;/*!< Transmit data register */ __IO uint32_t BRG;/*!< Baud Rate Generator register */ __IO uint32_t INTSTAT;/*!< Interrupt status register */ __IO uint32_t OSR;/*!< Oversample selection register */ __IO uint32_t ADDR;/*!< Address match register */ } LPC_USART_T; |