Reset after setting M3MEMMAP Register

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Reset after setting M3MEMMAP Register

422 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by gianlucarenzi on Mon Nov 19 09:06:56 MST 2012
Hello,
I am stuck on a reset-after-setting-the-m3memmap register.
Scenario: my application (a bootmonitor) is loaded from SPIFI at boot.
Before running main() it relocate itself into SRAM address space (0x1000_0000) VTOR and other stuff.
It uses the SPIFI (ROM)Library to access the SPIFI Device (64Mbit) to program/erase the device using a simple protocol via UART interface.
When the bootmonitor receive a JUMP instruction to execute the user-application something goes wrong:

The SPIFI Area (between 0 - 0x0008_0000) 512K are reserved for bootmonitor itself (remapped 0x1400_0000 - 0x1408_0000).
The SPIFI Area (between 0x0008_0000 up to 7.5MBytes) are reserved for user application (linked-relocated at 0x0000_0000 but physically located at those address space 0x1408_0000...0x1478_0000)

The bootmonitor when receive the JUMP command:

1- set the M3MEMMAP register to 0x1408_0000 (so at the next M3-reset the address 0x0000_0000 is relocated at 0x1408_0000) where are the VTORs data (SP, Reset Handler, Exception Handlers,...)
2- disable every interrupt using __disable_irq() provided by the CMSIS-Library
3- Hit a PERIPH_RST writing RGU_SIG_PERIPH bit (1) in the LPC_RGU->RESET_CTRL0 register.

Nothing happens. I thought my application stack pointer and Reset Handler started, but nothing.

If I use the RGU_SIG_CORE bit (0) in the LPC_RGU->RESET_CTRL0 register, ALL the system is rebooted as the PowerOn, so the M3MEMMAP has the 0x8000_0000 value.

Where I am doing the wrong thing?


Please help me,
Best regards,
Gianluca
Labels (1)
0 Kudos
Reply
1 Reply

374 Views
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by uratan on Tue Nov 20 03:44:23 MST 2012
I'm trying LPC1830 (rev.A).

> 1- ... (so at the next M3-reset

Yes it is just after next reset that the CPU fetches vectors,
but it seems that the effect of M3MEMMAP is appeared real-time-ly.
So...

> 2- disable every interrupt

this shall be done first before changing M3MEMMAP, I think.


> 3- Hit a PERIPH_RST

PERIPH_RST will reset SPIFI interface logic, connection to
SPIFI-flash will be lost.
After reset, your user-application code/vector on SPIFI-flash
can not be read by CPU, because boot-ROM codes which initializes
SPIFI interface are not run.
Try more narrow range reset like M3_RST if you want to keep
peripheral settings like SPIFI/UART/GPIO or misc clocks.

I think that Reset-System-Hierarchy description in UM10430 is a little hard to grab.
On Fig 30, all unit connection shall be drawn without omission to trace, I expect.
  (I'm still seeking how CGU/CCU is reset...)
--
  < http://www002.upp.so-net.ne.jp/uratan/xplr/endex.html >
0 Kudos
Reply