Hi guys,
I have LPC54102 xpresso evaluation board for LPC54102j514BD64 and I am asked to writing the code to run the unit at maximum frequency,100 MHz, or let say 96 MHz.
the problem is that I followed every single step in data sheet and tried to toggling the on board LED with pll output clock. I Know that there is a library there bit I am restricted to do not use any library. the problem is that after I switching from IRC clock to Pll out clock the software can not execute any instruction anymore and I got the following error:
No source available for "0x5f809602".
here is my code:
#define AHBCLKCTRL0 *(volatile unsigned long *)(0x400000C0)
//defining the address of base of GPIO direction register
#define GPIO_BASE 0x1c000000
#define GPIO_DIRECTION_OFFSET 0x2000
#define GPIO1_DIRECTION_OFFSET 0x2004
#define GPIO_PORT0_DIRECTION_REGISTER *(volatile unsigned long *)(GPIO_BASE+GPIO_DIRECTION_OFFSET)
#define GPIO_PORT1_DIRECTION_REGISTER *(volatile unsigned long *)(GPIO_BASE+GPIO1_DIRECTION_OFFSET)
//defining the GPIO Register address for toggling
#define GPIO_TOGGLE_OFFSET 0x2300
#define GPIO_PORT0_TOGGLE_REGISTER *(volatile unsigned long *)(GPIO_BASE+GPIO_TOGGLE_OFFSET)
//defining GPIO port0 pin register
#define GPIO_PORT0_PIN_REGISTER_OFFSET 0x2100
#define GPIO_PORT0_PIN_REGISTER *(volatile unsigned long *)(GPIO_BASE+GPIO_PORT0_PIN_REGISTER_OFFSET)
//define the main clock register
#define MAINCLKSELB *(volatile unsigned long *)(0x40000084)
//define the divider value
#define AHBCLKDIV *(volatile unsigned long *)(0x40000100)
// define the selector of PLL input
#define SYSPLLCLKSEL *(volatile unsigned long *)(0x400000A0)
//define system pll control register
#define SYSPLLCTRL *(volatile unsigned long *)(0x400001B0)
//define the main clock source register
#define MAINCLKSELA *(volatile unsigned long *)(0x40000080)
//define System PLL N-divider register
#define SYSPLLNDEC *(volatile unsigned long *)(0x400001B8)
// define pll p dec
#define SYSPLLPDEC *(volatile unsigned long *)(0x400001BC)
// define pll setting MDEC
#define SYSPLLSSCTRL0 *(volatile unsigned long *)(0x400001C0)
//define RTC oscillator control register
#define RTC_oscillator_control *(volatile unsigned long *)(0x40000190)
//define the source for asynchronize
#define ASYNCAPBCLKSELA *(volatile unsigned long *)(0x40080020)
// define the source for asyncronize
#define ASYNCAPBCLKSELB *(volatile unsigned long *)(0x40080024)
// define Asynchronous APB clock divider register
#define ASYNCCLKDIV *(volatile unsigned long *)(0x40080028)
//define ADC clock source select
#define ADCCLKSEL *(volatile unsigned long *)(0x4000008C)
//define ADC clock source divider
#define ADCCLKDIV *(volatile unsigned long *)(0x40000108)
//define CLKOUT clock source select register
#define CLKOUTSELA *(volatile unsigned long *)(0x40000094)
//define CLKOUT clock source select register
#define CLKOUTSELB *(volatile unsigned long *)(0x40000098)
//define CLKOUT clock divider register
#define CLKOUTDIV *(volatile unsigned long *)(0x4000010C)
//define the power register
#define PDRUNCFGSET *(volatile unsigned long *)(0x40000214)
#define PDRUNCFGCLR *(volatile unsigned long *)(0x40000218)
#define FREQMEAS_TARGET *(volatile unsigned long *)(0x40050164)
#define FREQMECTRL *(volatile unsigned long *)(0x40000120)
#define FREQMEAS_REF *(volatile unsigned long *)(0x40050160)
#define CLKOUTSELA *(volatile unsigned long *)(0x40000094)
#define CLKOUTSELB *(volatile unsigned long *)(0x40000098)
#define CLKOUTDIV *(volatile unsigned long *)(0x4000010C)
#define SYSPLLSTAT *(volatile unsigned long *)(0x400001B4)
#define AHBCLKCTRLSET0 *(volatile unsigned long *)(0x400000C8)
#define AHBCLKCTRLCLR0 *(volatile unsigned long *)(0x400000D0)
#define RTCOSCCTRL *(volatile unsigned long *)(0x40000190)
#define CTRL *(volatile unsigned long *)(0x400000C0)
#define AHBCLKCTRLSET1 *(volatile unsigned long *)(0x400000CC)
#define AHBCLKCTRL1 *(volatile unsigned long *)(0x400000C4)
#define SYSTICKCLKDIV *(volatile unsigned long *)(0x400000E0)
#define IOCON_P021 *(volatile unsigned long *)(0x4001C054)
int main(void)
{
double x, y, sumProduct;
int i;
int k;
int k2;
int k3;
int s;
k=0;
k2=0;
k3=0;
i=0;
x=0.00254987;
y=0.254895;
sumProduct=0;
AHBCLKCTRLSET0 = (1<<13) | (1<<14) | (1<<15)
SYSTICKCLKDIV = 0x1;
PDRUNCFGSET = (1<<22);
SYSPLLCLKSEL = 0x00;
SYSPLLCTRL = 0x00151d00;
SYSPLLSSCTRL0 = (1<<18) | 0x7f55;
SYSPLLSSCTRL0 |= (1<<17);
SYSPLLSSCTRL0 &= ~(1<<17);
SYSPLLNDEC = 0x01;
SYSPLLNDEC |= (1<<10);
SYSPLLNDEC &= ~(1<<10);
SYSPLLPDEC = 0x7f;
SYSPLLPDEC |= (1<<7);
SYSPLLPDEC &= ~(1<<7);
PDRUNCFGCLR = (1<<22);
k = SYSPLLSTAT;
while (i<1000000)
{
i++;
}
k = SYSPLLSTAT;
IOCON_P021 = 0x1;
MAINCLKSELB = 0x02;
GPIO_PORT0_DIRECTION_REGISTER |= (0x40000000);
while (1){
GPIO_PORT0_TOGGLE_REGISTER |= (0x40000000);
for(i=0;i<100000;i++)
sumProduct+=x*y;
}
return 0 ;
}
Without looking at the details of your PLL programming, it seems like you're powering it down again before using it:
PDRUNCFGCLR = (1<<22);
Also use the built-in power management routines (call the set_voltage() power profile API function to announce your operating frequency). The device will not run at 100 MHz if you don't.
Apart from powering down the PLL. How do you call set_voltage API function. Datasheet is quite vague on details...
So from datasheet:
typedef struct _PWRD {
unsigned int (*set_pll)(unsigned int mul, unsigned int inFreq);
unsigned int (*set_voltage)(unsigned int mode, unsigned int desFreq);
void (*power_mode_configure)(unsigned int mode, unsigned int peripheral);
}PWRD;
#define rom_driver_ptr (*(ROM)**) 0x03000200
pPWRD = (PWRD*)(rom_driver_ptr->pPWRD);
pPWRD->set_voltage(??, 96000000);
What I dont understand from this is,
- how is ROM defined
- what is pPWRD
- what is param0 in set_voltage. There is only description mode =0 for low power mode .. should I select some arbitrary value here ?
Thanks...
https://community.nxp.com/thread/432979 is the solution to this.