Thank you for your information about FTM samples.
But, I gradually remember that "FlexTimer" IP has been designed and implemented in Freescale-brand products...
If so, I'm taking a wrong choice to my application. I'd given-up to do that on Kinetis serise etc...
Anyway, let me try to explain my request in detail and simple to find a solution.
I want to generate one PWM cyclinc pulse output signal in constant rate and duty.
But, internally I would like to invoke/trig DMA just once-per-twice (or once-per-three-PWM cycles).
It's a "Thin-out" kind of logic reducing the occuerence of DMA keeping synchronization to PWM output.
In case of SCTimer I can set the period for three PWM cycle long and with three-pairs of comparators to drive one common output node from SCTimer with each comparator pair setting representing the first, second and third flip timings, while DMA request trigger is set enabled just on one of those six comparison event.
FlexTimer does NOT have flexibility to take those scenario by itself, I suppose.
If the event-acceptor pathways, in this case connection to DMAC, have some thin-out feature/programmable-behavior, that would also be a solution to me.
SCTimer's nature seems to be a generic State-Controlled event-generatior equally treating MCU internal event such as triggering DMA and output flipflop behind physical output PINs. Not so much to with 'timer' behavior commonly imaginable.In fact, I'd often utillize SCTimer for detecting I2C's Start-Condition and Stop-Condition that indicates Bus-busy signal.
Thanx
