Content originally posted in LPCWare by Rorrik on Fri Oct 03 14:24:33 MST 2014
Using the following code to configure my SPI Master, I expect to see a 100 Kbs clock on P0_9, my sent signal on P0_15, and my chip select on P0_8.
regVal = LPC_SWM->PINASSIGN4 & ~( 0xFFUL<<24 );
LPC_SWM->PINASSIGN4 = regVal | ( 0x9<<24 ); //9 SCK
regVal = LPC_SWM->PIN ASSIGN5 & ~( 0xFF<<0 );
LPC_SWM->PINASSIGN5 = regVal | ( 0xF<<0 );//15 MOSI
regVal = LPC_SWM->PINASSIGN5 & ~( 0xFF<<8 );
LPC_SWM->PINASSIGN5 = regVal | ( 0x11<<8 );//17 MISO
regVal = LPC_SWM->PINASSIGN5 & ~( 0xFF<<16 );
LPC_SWM->PINASSIGN5 = regVal | ( 0x8<<16 );//8 SSEL
SPI_Init(LPC_SPI1, 0x7D, CFG_MASTER, DLY_PREDELAY(0)|DLY_POSTDELAY(0)|DLY_FRAMEDELAY(0)|DLY_INTERDELAY(0));
message = (uint8_t *) TestSignal;
mSize = 2*sizeof(TestSignal) / sizeof(TestSignal[0]);
SPI_Send( LPC_SPI1, CS_USED, message, mSize);
Probing each of these three pins, I see my test signal on pin P0_15 as expected, and the bit width is 10 microseconds as expected, corresponding to a clock period of 10 microseconds and a clock rate of 100 Kbs. However, I don't see a clock on P0_9 or the chip select on P0_8.
Any ideas what the problem could be? It should be noted that I am using SPI0 as a Slave and successfully receiving a signal from a master on pins 12, 13, and 14 before sending my master signal here.
Thanks!