LPC55S69 : multiple veneer tables how-to ?

[EugeneHiihtaja]

Hello !

I would like to isolate task and libraries in our implementation as max as it possible.

1. I have 3 tasks with User privileges what are running  in Non-Secure mode. Each task should be able to call

   own set of API of libraries what are located in Secure mode.

In other case looks like any task can call any Secure API if the visible in NSC veneer table.

I think I should configure secure MPU for be sure if libraries are completely not visible to each other and relevant MPU configuration is written all the time when API's of some library is called from Non-Secure part.

I can see on web some mentioning about uVisor library manager but it is not so clear if this components are standard

and can it be recommended by NXP for usage.

Or what technique you can recommend to have full isolation between libraries on Secure side ?

How to configure several NSC tables what can be visible to only one FreeRTOS task on Secure and Non-Secure side ?

It is not visible any MPU attributes on Secure and non-Secure side to know if this is NSC table type of area.

2. Can you explain how-to RTOS scheduling happens in freertos-mpu-ns SDK example in case when Task with User privileges should call some API on secure side and rescheduling should be done.

Systick interrupt will be handled on Non-Secure part and it not depends where code running now, on Secure or NonSecure side. But can code API execution on Secure side to be interrupted at any point ?

Or API should returned from Secure side , after that continue ?

I mean all API at Non-Secure side should be locked to Critical sections ( scheduler suspended), and task only can be rescheduled when returned from Secure world ?

Or it should be fully Secure task ? E.g NonSecure task send IPC to task what is done as fully executed on Secure side and it signal back to Non-Secure part.

I mean freeRTOS on NonSecure side is implemented in way that it able to execute some Tasks on Secure side as well ?

Do you have tickless freeRTOS implementation for LPC55S69 already or it is useless for this kind of MCU ?

Regards,

Eugene

[Sabina_Bruce]

Hello Eugene,

I am not sure if I understand what you are trying to achieve. You can secure and unsecure certain regions by the SAU and IDAU. These can describe specific memory regions to eithe be secure, non-secure or non secure callable. The best practices is to have you secure functions on one region and if nonsecure apis need to access them they can only do so through the nonsecure callable region. Please check Section 47.3.1.1 to Section 47.3.2.2 of the Reference Manual. These sections will clarify what can be done with the different regions.

The description in the readme.txt file describes the function like this:

The MPU demo creates 3 unprivileged tasks - One of which has Read Only access to a shared memory region, the second one has Read Write access to the same region and the third one has Read Write access to a non-secure counter. The task with Read Only access reads from the shared memory but can not write into it which would result in memory fault (User can try to uncomment respective line of code to test this behavior). The Read Write task writes to the shared memory. The third task which is created calls a secure side function and passes a pointer to a callback function. The secure side function does two things: 1. It calls the provided callback function. The callback function increments
a non-secure counter. 2. It increments a secure counter and returns the incremented value. After the secure function call finishes, it verifies that both the counters are incremented.

Could you please specify with of the three tasks you are referring to in the example?

There is an example in the SDK for the LPC55S69, that demonstrates the use of tickless FreeRTOS.

Best Regards,

Sabina