LPC55S69 Debug Problem with JLink V9

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LPC55S69 Debug Problem with JLink V9

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wmp
Contributor I

Recently i have made an LPC55S69 basic-system PCB  equiped with a standard SWD(SWCLK,SWDIO,SWO and RESET signal) Debug probe.But when i conneted my jlink to the board and pressed debug button in mcuxpresso ide with an opened example GPIO project import from the SDK,errors showed "connot connect to the tartget".However,the debugger has detected the mcu's Model.

I have checked my PCB routes and SCH connections,it seems I have made everthing properly, 10K pull-up resistor on SWCLK and SWDIO or default jtag pin connections.

Did anybody ever make a circuit board based on this mcu?Could anyone tell me the debug result about his own board?20191224215406.png

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ZhangJennie
NXP TechSupport
NXP TechSupport

Hi WM

Please refer this article to design your debug interface

Design Considerations for Debug 

Have a nice day

Jun Zhang

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