LPC546 SRAMX Uses

[guitardenver]

I am developing on the LPC54605 MCU and I am reading about the SRAMX. I was wondering what this is commonly used for? What benefits can this have?

The Users Manual says:
"This RAM can be used, for example, as the location for the program stack, common data, or any other use where a
separate access away from the Main SRAM has an advantage."

1) What advantage would putting the program stack in SRAMX be?

2) What advantage would putting "common data" on the SRAMX be?

3) The SRAMX is on the local busses I-CODE D-CODE. Does this mean it much faster to execute code from this SRAM than the other SRAM banks? Or is this used specifically for the XIF with SPIFI?

4) I also read the SRAMX is cleared on startup, is this true? It is cleared by hardware on startup without the C environment startup code clearing it?

Thanks,

Matt

[jeremyzhou]

Hi Matt Lang,

Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
1) What advantage would putting the program stack in SRAMX be? and what advantage would putting "common data" on the SRAMX be?
-- Instruction fetch and data access allow for 1 cycle CPU access, it's definitely faster than the main SRAM which connects the System clock.
2) Is this used specifically for the XIF with SPIFI?
-- No.
3)  I also read the SRAMX is cleared on startup, is this true? It is cleared by hardware on startup without the C environment startup code clearing it?
-- Yes.
Have a great day,
TIC

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