Looks like a mistake to me.
According to the ARM documents here: ARM Information Center, the Cortex-M4 has a rating of 1.25 DMIPS/MHz with 0 wait-state memory (for comparison, the Cortex-M3 is 1.24 DMIPS/Mhz). So, at 100MHz, the DMIPS is 125 - and that will be the maximum possible. So the 220 number looks bogus (this would imply a clock frequency of 176MHz).
Hi Con Verse,
Thank you for your interest in NXP Semiconductors products and the opportunity to serve you.
DMIPS figures is susceptible to many other factors, besides the true performance of the CPU. Often, the variation in performance is due to the efficiency of the C compiler.
There are the DMIPS figures with the compiler optimization.
Regarding to Cortex-M3, they are 1.25/1.50/1.89 DMIPS/MHz.
Regarding to Cortex-M4, they are 1.25/1.52/1.91 DMIPS/MHz (without FPU) and 1.27/1.55/1.95 DMIPS/MHz (with FPU).
And regarding to the 220 DMIPS, only some dual core MCU can be able to get.
Hope this is clear.
Have a great day,
Ping
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Hi jeremyzhou,
Thanks for the reply. Could you please explain in little more detail how the DMIPS number were obtained for LPC54102 (220 DMIPS) and LPC54114 (125 DMIPS) MCUs (both dual core M4F/M0+) that are on the website LPC541XX|NXP ?
Like, were both the cores running or it was just Cortex M4? Did you use the same optimized C compiler for both? If not, is there is a way to get the same performance out of LPC54114 by optimizing the C compiler the same way it was optimized for LPC54102 ?
I am just trying to compare the performance of LPC54114 and LPC54102 MCUs but huge difference in DMIPS number is making it confusing.
Thanks,
Hi Kam Saini,
Thanks for your reply.
Actually, I've also had none further information about the DMIPS of the LPC54102 and LPC54114.
According to the DMIPS figures, we can recognize the design purpose of these two MCU is not same definitely.
And I've also contacted with the AE team, and their reply is consist with my guess.
Hope this is clear.
Have a great day,
Ping
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