LPC1857 as a JTAG host (not slave)

[lpcware]

Content originally posted in LPCWare by smalouin on Fri Sep 05 12:54:57 MST 2014
Hello,

we want to use out lpc1837 to flash a cpld device on the same board.

Anybody as some code to act as a JTAG controller?

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Sun Sep 21 09:50:34 MST 2014
We are programming an Actel (now Microsemi) device (A3P250) from an LPC1778, but the principle is exactly the same.

You will need to bit-bang some port pins (4 -- or optionally 5 -- in number), just make sure that you have the proper pull ups etc.

On the Microsemi site search for "DirectC" and download the source zip. [NB: they make you register!]

There are a few "C" files that you have to edit -- (to set set your chosen pins high and low and a delay function), but the
JTAG bit banging is done for you via other supplied "C" files.

Direct C is a bit specific to the Actel parts, so [as a complete alternative] you may prefer their STAPL player source code
which then takes an (FPGA) industry standard (JEDEC) stapl file.

Unfortunately, I cannot share code as I work for a company and it is LPC1778 specific anyway.

HTH, Mike

[lpcware]

Content originally posted in LPCWare by Pacman on Wed Sep 10 04:32:19 MST 2014
@bavarian: These are absolutely very useful resources. Thank you for posting them. :)

[lpcware]

Content originally posted in LPCWare by bavarian on Wed Sep 10 04:28:13 MST 2014
Just a bunch of links I found:

http://dangerousprototypes.com/docs/Bus_Pirate_JTAG_XSVF_player

http://openschemes.com/2011/10/25/bit-bang-jtag-programming-of-xilinx-cpld-using-ft232-homebrew-svf-...

http://www.xilinx.com/support/documentation/application_notes/xapp058.pdf



Regards,
NXP Support Team.

[lpcware]

Content originally posted in LPCWare by Pacman on Tue Sep 09 05:05:39 MST 2014
If the device is a microcontroller that has SWD interface or CMSIS-DAP, it might be easier to use one of those protocols.
-Otherwise, I agree with bavarian; it might be worth it to take a look at OpenOCD and extract the functionality you need.
I once came across a good site explaining it, but unfortunately I forgot the URL.
However this site might be better.
Also this source code looks interesting.
...You probably have a logic analyzer, which will be essential for writing such firmware; if not, I recommend getting one.

[lpcware]

Content originally posted in LPCWare by bavarian on Tue Sep 09 02:27:42 MST 2014
How did you manage to get a 5-star rating for only this question   8-)

Of course the JTAG port of the LPC1837 cannot work as a host. The debug block coming along with the ARM core IP does not foresee that.
However, if you open Keil ULINK or SEGGER jlink devices you will see an LPC microcontroller doing the USB-2-JTAG conversion. The JTAG port is done with GPIO bit banging or a combination of SPI and GPIO.
The know how for the JTAG port handling is with Keil and Segger and the other debugger manufacturers.

If you want to dig into this topic then maybe OpenOCD is the project you could look at. OpenOCD is of course a big beast, maybe there are some other projects around for especially CPLD or FPGA devices.
I would recommend to look for simple programs deling exactly with the CPLD you use, maybe the manufacturer website provides an example which you can port to the LPC1837.

Regards,
NXP Support Team