Keil's system_LPC43xx.c doesn't set the internal flash timing register

[lpcware]

Content originally posted in LPCWare by starblue on Thu Apr 11 04:15:06 MST 2013

Just a note to those using the Keil toolchain like me:

The default value of FLASHTIM in the FLASHCFGx registers is 4 after reset (appropriate up to 107 MHz according to the user manual).

The system_LPC43xx.c file from Keil changes the clock frequency but doesn't set FLASHTIM accordingly

(at room temperature it runs fine at that setting, so nobody seems to notice).

With the correct setting the execution time increases by about 40% in my application.

BTW, the CREG structure in the LPC43xx.h header in the latest CMSIS (2012-12-12) doesn't contain FLASHCFGA/B,

it would be .nice if it could be updated.

[lpcware]

Content originally posted in LPCWare by starblue on Mon Apr 15 02:17:05 MST 2013
Sorry, I didn't want to change LPC43xx.h, so I just cast the addresses to pointers locally.

BTW, the author of the startup code in the latest CMSIS did a similar thing,
using offsets from the base of the CREG structure.

[lpcware]

Content originally posted in LPCWare by starblue on Mon Apr 15 02:12:22 MST 2013

Sorry, I didn't want to modify LPC43xx.h, so I just cast the addresses to pointers locally.

(BTW, the startup code in the latest CMSIS uses offsets from CREG_BASE to initialize these registers.)

[lpcware]

Content originally posted in LPCWare by rgledhill on Fri Apr 12 06:11:45 MST 2013

Thanks!  Would you mind posting your modified file so we can make use of it please?

Cheers

Richard