How to do software-triggered interrupts for USART in LPC55S28?

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How to do software-triggered interrupts for USART in LPC55S28?

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devel
Contributor III

Hola. I'd like to use the age-old trick of using a software interrupt to kick off USART data transmission.

It's the usual sort of thing. I have a software FIFO (not the USART's built-in FIFO, and not the ring buffer that is part of the USART driver) that holds data packets to transmit, and I have a flag indicating whether the transmitter is busy sending anything. 

The only place where this FIFO is popped is in the USART's ISR as triggered by a transmit-complete interrupt. In that ISR, I check to see if the FIFO has any packets to send. If so, the packet is popped and written to the transmitter, and the transmit-busy flag is set. If not, then the transmit-busy flag is cleared and nothing new is sent.

Outside of the interrupt context, after a new packet is pushed to the FIFO, that routine checks to see if the transmitter is busy. If not, then it should trigger the USART's transmit-done interrupt to kick off the transmission. If the transmitter is already busy, then that doesn't happen as eventually there will be a TX-done interrupt which will pop the FIFO.

I don't see any obvious way to assert a software interrupt in the MCUXpresso SDK. Is such a function/feature buried elsewhere?

Thanks!

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Andy,

Yes, you are right, you can write the NVIC->STIR=0xxx to generate interrupt for the IRQxx. BTW, you can write the NVIC pending register to trigger an interrupt. For example vector index of Flexcomm Interface 0 is 14, you can write the following line to trigger an interrupt:

NVIC->ISPR[0]|=1<<14;

Hope it can help you

BR

XiangJun Rong

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devel
Contributor III

(replying to myself)

The NVIC has a register STIR which generates the interrupt for the interrupt number written for it. See page 34, section 3.4.26 of UM11126 rev 1.9.

So I suppose I can ask why there is no SDK function for this?

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Andy,

Yes, you are right, you can write the NVIC->STIR=0xxx to generate interrupt for the IRQxx. BTW, you can write the NVIC pending register to trigger an interrupt. For example vector index of Flexcomm Interface 0 is 14, you can write the following line to trigger an interrupt:

NVIC->ISPR[0]|=1<<14;

Hope it can help you

BR

XiangJun Rong

1,661 Views
devel
Contributor III

For what it's worth:

xiangjun.rong wrote:

Hi, Andy,

Yes, you are right, you can write the NVIC->STIR=0xxx to generate interrupt for the IRQxx.

works as expected. Writing to STIR invoked the desired interrupt. None of the interrupt-source status flags were asserted, which is also expected.

So I set a global flag that the ISR could check to see if the interrupt was caused by the software trigger or by a FIFO level.

BTW, you can write the NVIC pending register to trigger an interrupt. For example vector index of Flexcomm Interface 0 is 14, you can write the following line to trigger an interrupt:

NVIC->ISPR[0]|=1<<14;

I am not sure of the difference! (I should probably study more how the NVIC works.)

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Andy,

There is NOT additional flag to indicate the interrupt is triggered by software or hardware, in general, all interrupts are triggered by hardware, the software trigger can be used in test or special purpose.

BR

XiangJun Rong

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