TPM channel mode changes

[luisgallegos]

Hello.

Does anyone know what the phrase "acknowledged in the LPTPM counter clock domain" mean?

I am using a KL25 microcontroller (in the FRDM-KL25Z board) and that phrase is used in the datasheet when talking about changing the MSB:MSA and ELSB:ELSA bits in the TPMx_CnSC register for changing TPM channel modes.

From the tests I've made, I am assuming that it means that the change in the bits will not take effect until the TPM counter passes through 0, either going from MOD or CnV to 0, or going from 1-0-1 when using up-down counting (this is my case in particular).

Does anyone know for sure?

Thanks.

[adriansc · Accepted solution]

Hi,

You are right, most of  the changes that are made in the Timer/PWM Module are controlled by the TPM counter clock domain, this is because TPM has its own clock.

TPM module has two clock domains:

• Bus clock domain: is used by the register interface and for synchronizing interrupts and DMA requests.
• TPM counter clock domain: is used to clock and prescaler along with the output compare and input capture logic. It is considered asynchronous to the bus clock. Can remain operational in Stop mode.

You can find this information in KL25 Reference Manual (Document Name: KL25P80M48SF0RM.pdf) In section 31.4.1

Regards.