SW does not boot after WDG reset

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SW does not boot after WDG reset

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1,349 次查看
ktbalazs
Contributor II

Hi!

I have a well working SW on a MK22FN256VLH12, but then I implemented WGD. It was simple, I made a config what worked well in another project, call the init, etc.

This is my configuration:

const wdog_config_t wdogConfig =
{
.wdogEnable = true,// Watchdog mode
.timeoutValue = 0x7ffU,// Watchdog overflow time is about 2s
.winEnable = false, //Disable window function
.windowValue = 0x1ffU, // Watchdog window value
.prescaler = kWdogClkPrescalerDivide1, // Watchdog clock prescaler
.updateEnable = true, // Update register enabled
.clksrc=kWdogLpoClkSrc, // Watchdog clock source is LPO 1KHz
#if FSL_FEATURE_WDOG_HAS_WAITEN
.workMode.kWdogEnableInWaitMode = true, // Enable watchdog in wait mode
#endif
.workMode.kWdogEnableInStopMode = true, // Enable watchdog in stop mode
.workMode.kWdogEnableInDebugMode = false,// Disable watchdog in debug mode
};

For testing, I take a while(1); into the code to test the WDG. The reset happens, but the program does not boot or stays in reset.

I read out the reset reason bit and it says, wdog reset happens.

Of course, the watchdog is enabled in the startup file:

#define DISABLE_WDOG 0

What do you think? Why does it not start?

Thank you!

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1,335 次查看
ktbalazs
Contributor II

Hi @kerryzhou !

I refresh the WDOG in one of my loop, it works well.

The solution was to disable the watchdog in the startup file.

#define DISABLE_WDOG 1

Now the watchdog works well!

Do you have idea, why?

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @ktbalazs 

 Welcome to use the NXP kinetis product, I would like to provide service for you.

For your question: For testing, I take a while(1); into the code to test the WDG. The reset happens, but the program does not boot or stays in reset.

In fact, after you enable the WDOG, you need to feed the dog in period, the period should smaller than the watchdog timeout time, otherwise, the code will reset by the WDOG, you can't see it boot, becuase your WDOG is always booting.

 So you need to feed the dog(refresh) in the while(1), or you can disable the Watchdog, please note, after reset, the watchdog register enable bit just can be configure once, other directly write is no usage.

So, if you want to start with the watchdog enabled, you need to refresh the watchdog before it is timeout.

The watchdog example has the refresh code, you can use it.

 

Wish it helps you!

If you still have questions about it, please kindly let me know.

Best Regards,

Kerry

 

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ktbalazs
Contributor II

Hi @kerryzhou !

I refresh the WDOG in one of my loop, it works well.

The solution was to disable the watchdog in the startup file.

#define DISABLE_WDOG 1

Now the watchdog works well!

Do you have idea, why?

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1,333 次查看
kerryzhou
NXP TechSupport
NXP TechSupport

Hi @ktbalazs ,

 Perfect.

   disable the watchdog in the startup file is to let the code start. 

If you check the detail code, you will find it operate the watchdog register directly.

Now, do you still have the question? 

Best Regards,

KERRY

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ktbalazs
Contributor II

No, disabling the WDG in the startup file was the solution.

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kerryzhou
NXP TechSupport
NXP TechSupport

Hi @ktbalazs ,

  Thanks for your updated information.

  If your question is solved, please help to mark the correct answer, just to close this case.

 Any new issues in the future, welcome to create the new case.

Best Regards,

Kerry

 

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