SPI receive interrupt on KL27

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SPI receive interrupt on KL27

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rickstuart
Contributor V

Hi,

I have two FRDM-KL27Z development boards.  They are connected using the SPI0 port.  One is master and the other slave.  I can send/receive 16bit data between them using polling.  Now I need to change the slave to receive 2 8bit bytes.  Polling is not fast enough anymore.  I keep missing the second 8bit byte.  So I want to try using receive interrupts on the slave.  But so far I am getting no interrupts.  The 2 SPI configuration registers are set up as such:

  SPI0->C1 = SPI_C1_SPIE_MASK | SPI_C1_SPE_MASK | SPI_C1_CPHA_MASK | SPI_C1_SSOE_MASK;

  SPI0->C2 = SPI_C2_MODFEN_MASK;

And I'm using SPI0_IRQHandler() as the name of the SPI0 interrupt handler.  This is defined in the Freescale startup_MKL27Z644.s file.  That file has this header for identification:

; ---------------------------------------------------------------------------------------

;  @file:    startup_MKL27Z644.s

;  @purpose: CMSIS Cortex-M0P Core Device Startup File

;            MKL27Z644

;  @version: 1.4

;  @date:    2014-9-22

;  @build:   b140923

; ---------------------------------------------------------------------------------------

I had thought setting the SPI_C1_SPIE_MASK bit would enable the receive SPI interrupt.  But it looks like the interrupt is never getting called.

-thanks

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hello rick stuart:

Apart from enabling the interrupt from the SPI module you need to enable the interrupt vector for the ARM NVIC module. Something like this:

NVIC_EnableIRQ(SPI0_IRQn);


Regards!,
Jorge Gonzalez

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Jorge_Gonzalez
NXP Employee
NXP Employee

Hello rick stuart:

Apart from enabling the interrupt from the SPI module you need to enable the interrupt vector for the ARM NVIC module. Something like this:

NVIC_EnableIRQ(SPI0_IRQn);


Regards!,
Jorge Gonzalez

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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