Required System Control Block information

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Required System Control Block information

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manjunathkm
Contributor III

Hi,

I am unable to see System Control Block information in the user manual, Can somebody provide me this info

Thanks in Advance

Manjunath

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942 次查看
manjunathkm
Contributor III

Hi Hui,

Part no is S9KEAZ128MLH 2N45K

Many Thanks,

Manjunath

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942 次查看
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi Manjunath,

Which product you are using? Please tell us the chip part number. Thanks.

best regards,

Mike

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943 次查看
manjunathkm
Contributor III

Hi Hui,

Part no is S9KEAZ128MLH 2N45K

Many Thanks,

Manjunath

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

The KEA128 is using ARM Cortex-M0+ core.

In an ARMv7-M processor, a System Control Block (SCB) in the SCS provides key status information and
control features for the processor.

More detailed info about System Control Block (SCB), please check <ARM®v7-M Architecture Reference Manual> chapter B3.2.1 About the System Control Block.

Wish it helps.


Have a great day,
Ma Hui

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942 次查看
manjunathkm
Contributor III

Hi Ma Hui,

Thanks for the info.

I can able to remap vector table to SRAM and found it is working. But i don't understand why this is not provided in the Controller reference manual.

I was got confused by reading some of the articles, In some article says that, we have to fill Address of the SRAM in the VTOR register, but in some other article says, 23rd bit shall be set or reset to remap to SRAM/Flash.

For me, putting SRAM address to VTOR register works.

Thanks for providing some reference

Have a great day,

Manjunath

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Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

In Kinetis MCUs, the SCB_VTOR register contains the base address of the exception vector table.

To redirect vector table, copy the vector table to RAM and set the SCB_VTOR to the RAM address.

Thank you for the attention.


Have a great day,
Ma Hui

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