MK20DX128VFM5 USB_DM/DP maximum rating and power sequence

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MK20DX128VFM5 USB_DM/DP maximum rating and power sequence

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706件の閲覧回数
chenghenry
Contributor I

Hi 

I have some questions as below:

1. The operating rated voltage of the USB interface specification is 3.63V, but the maximum rated value of USB_DM/DP cannot be found. Currently I have put ESD diode protection. should I need change to the USB protection IC (TPD2S703) to protect against high voltage?

2.Where can I find the MK20DX128VFM5 power sequence? the Vregin/Vout33/VDD/RESET/ ... (I supply VDD from Vout33 following the S32K144 EVB design.)

Many thnaks~

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690件の閲覧回数
Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Below you will hopefully find the answers to the asked questions:

1. Normally, The ESD protection on USB data lines is fine. Depending on your internal requirements, you may need to implement higher protection or even isolation. But again, this is dependent on your internal requirements. The electrical USB characteristics of USB conforms to the USB On-the-Go standard, if you need this specifications, please help us visiting usb.org where you should find this specs [6.8.1 USB electrical specifications, Page 43, K20 Sub-Family Data Sheet, Rev. 4, 5/2012].

2. There is no record of a power-sequence regarding K20, at least to my notice. The only information regarding this 3 signals (and a diagram) is inside K20 RM [Figure 3-42 USB regulator Li-ion usecase, K20 Sub-Family Reference Manual, Rev. 2, Feb 2012] .

If you are supplying VDD from Vout33, it means you will supply the MCU through Vregin. The only signal that isn't present in this flow is the RESET signal. This signal should connected to a Pull-up to the same voltage as VDD (which will be Vout33, in this particular case) so it will come at the same time or a little after the MCU has a valid voltage supply. RESET signal should never be released before the MCU has a valid voltage, if done, the behavior is undetermined.

Please, let us know if there is anything else we can help you with.

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691件の閲覧回数
Daniel-Aguirre
NXP TechSupport
NXP TechSupport

Hi,

Below you will hopefully find the answers to the asked questions:

1. Normally, The ESD protection on USB data lines is fine. Depending on your internal requirements, you may need to implement higher protection or even isolation. But again, this is dependent on your internal requirements. The electrical USB characteristics of USB conforms to the USB On-the-Go standard, if you need this specifications, please help us visiting usb.org where you should find this specs [6.8.1 USB electrical specifications, Page 43, K20 Sub-Family Data Sheet, Rev. 4, 5/2012].

2. There is no record of a power-sequence regarding K20, at least to my notice. The only information regarding this 3 signals (and a diagram) is inside K20 RM [Figure 3-42 USB regulator Li-ion usecase, K20 Sub-Family Reference Manual, Rev. 2, Feb 2012] .

If you are supplying VDD from Vout33, it means you will supply the MCU through Vregin. The only signal that isn't present in this flow is the RESET signal. This signal should connected to a Pull-up to the same voltage as VDD (which will be Vout33, in this particular case) so it will come at the same time or a little after the MCU has a valid voltage supply. RESET signal should never be released before the MCU has a valid voltage, if done, the behavior is undetermined.

Please, let us know if there is anything else we can help you with.

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670件の閲覧回数
chenghenry
Contributor I

Hi Daniel

Thanks for your help~
1. OK, I will implement the ESD protection according to our design.
2.Yes, I will follow the EVB design, the MCU VDD supply from Vout33,
And the EVB design use the USB VBUS to pull-up the reset pins throuh the voltage divider circuit to ensure the Reset status at a high level befor the MCU has a valid voltage.

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