KV58F, PWM protection

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KV58F, PWM protection

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a8Chcx
Contributor V

Hi,

I am using KV58F to control my BLDC motors. It works fine for normal running.

But, it will cause the problem if there is fault conditions(FAULT0~~FAULT3) happen...

The problem, is that the PWM channel does not disable completely. It will cause over-current because there are no dead-time control in output.

It works fine with MCF56F8367 DSP that I used for our earlier controller.

Here are the some code related PWM protection:

//-----*****Set up Protection of PWM0&1 based on Fault0~~Fault3*****-----
// Fault3---D_Q
// Fault2---PL_LIMIT
// Fault1---AZ_LIMIT
// Fault0---EL_AZ
INETVU_PWM0_BASEADDR->SM[0].DISMAP[0] = PWM_DISMAP_DIS0A(0x09) | PWM_DISMAP_DIS0B(0x09); // Channel 0---Protection on FALUT3(D_Q)&FAULT0(EL_AZ)
INETVU_PWM0_BASEADDR->SM[1].DISMAP[0] = PWM_DISMAP_DIS0A(0x09) | PWM_DISMAP_DIS0B(0x09); // Channel 1---Protection on FALUT3(D_Q)&FAULT0(EL_AZ)

INETVU_PWM0_BASEADDR->SM[2].DISMAP[0] = PWM_DISMAP_DIS0A(0x09) | PWM_DISMAP_DIS0B(0x09); // Channel 2---Protection on FALUT3(D_Q)&FAULT1(AZ_LIMIT)&FAULT0(EL_AZ)

INETVU_PWM1_BASEADDR->SM[0].DISMAP[0] = PWM_DISMAP_DIS0A(0x0B) | PWM_DISMAP_DIS0B(0x0B); // Channel 0---Protection on FALUT3(D_Q)&FAULT1(AZ_LIMIT)&FAULT0(EL_AZ)

 INETVU_PWM1_BASEADDR->SM[1].DISMAP[0] = PWM_DISMAP_DIS0A(0x0B) | PWM_DISMAP_DIS0B(0x0B); // Channel 1---Protection on FALUT3(D_Q)&FAULT2(PL_LIMIT)&FAULT0(EL_AZ)
INETVU_PWM1_BASEADDR->SM[2].DISMAP[0] = PWM_DISMAP_DIS0A(0x0B) | PWM_DISMAP_DIS0B(0x0B); // Channel 2---Protection on FALUT3(D_Q)&FAULT2(PL_LIMIT)&FAULT0(EL_AZ)

// Fault 0/1/2/3 active in logic level one, automatic clearing
INETVU_PWM0_BASEADDR->FCTRL = PWM_FCTRL_FLVL(0x0F);
INETVU_PWM0_BASEADDR->FCTRL |= PWM_FCTRL_FAUTO(0x0F);

INETVU_PWM1_BASEADDR->FCTRL = PWM_FCTRL_FLVL(0x0F);
INETVU_PWM1_BASEADDR->FCTRL |= PWM_FCTRL_FAUTO(0x0F);

// PWMs are re-enabled at PWM full cycle
INETVU_PWM0_BASEADDR->FSTS |= PWM_FSTS_FFULL(0x0F);
INETVU_PWM1_BASEADDR->FSTS |= PWM_FSTS_FFULL(0x0F);

// PWM Fault filter - 20 Fast periph. clocks sample rate, 7 agreeing samples to activate
INETVU_PWM0_BASEADDR->FFILT = (PWM_FFILT_FILT_PER(20) | PWM_FFILT_FILT_CNT(7));
INETVU_PWM1_BASEADDR->FFILT = (PWM_FFILT_FILT_PER(20) | PWM_FFILT_FILT_CNT(7));

// Software Controlled Output Register---For unipolar PWM control
INETVU_PWM0_BASEADDR->SWCOUT = 0x0000;
INETVU_PWM1_BASEADDR->SWCOUT = 0x0000;

 

Can anyone help to find out why the protection does not work properly?

Thanks,

Christie

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_Leo_
NXP TechSupport
NXP TechSupport

Hi Christie,

I have consulted the 56F8300 Peripheral User Manual and indeed PWM pin outputs are in tri-state if Output Pad Enable (PAD_EN) bit in PWM Output Control (PMOUT) is cleared.

nxf86756_0-1669399904244.png

So on the KV5x it is necessary to set the Fault state (PWMxFS) to either 10 or 11 to make the output tristated.

Just to clarify, tristated mode the output pin becomes high impedance when the Fault event happens, so in the case, external pull up/down resistor determines the logic of the PWM_xA, if you connect a pull-up resistor on the pin, the PWM_xA pin will be high, if you connect a pull-down resistor on the pin, the PWM_xA pin will be low.

Hope it helps you!

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1,972 次查看
_Leo_
NXP TechSupport
NXP TechSupport

Hi @a8Chcx,

Thank you so much for your interest in our products and for using our community.

Regarding your case, the SDK example twrkv46f150m_pwm_fault may help you as a reference. Which despite being a different device, the eFlexPWM module is similar, if not the same. That example demonstrates how the PWM signal shut down when a fault signal is detected.

Hope it helps you.

Have a nice day!

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a8Chcx
Contributor V

Hi,

I am using the sample, I found the following may be is not right in sample:

in this function, pwmSignal[0].faultState is not initialized, and I check it and is set to 1.

It means it will output 1 when protection happens. 

So, I think I should set it to 0x02 or 0x03, right?

Can you confirm which value I should use here?

Thanks,

Christie

void PWM_DRV_Init3PhPwm(void)
{
uint16_t deadTimeVal;
pwm_signal_param_t pwmSignal[2];
uint32_t pwmSourceClockInHz;
uint32_t pwmFrequencyInHz = 16000; // 16KHz---OKpwmSourceClockInHz = PWM_SRC_CLK_FREQ;

deadTimeVal = ((uint64_t)pwmSourceClockInHz * 25) / 10000000; // 2.5us ==187 clocks of 75MHz(==number of IPBUS clocK)

pwmSignal[0].pwmChannel = kPWM_PwmA;
pwmSignal[0].level = kPWM_HighTrue;
pwmSignal[0].dutyCyclePercent = 50; // 1 percent dutycycle
pwmSignal[0].deadtimeValue = deadTimeVal; 

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_Leo_
NXP TechSupport
NXP TechSupport

When fault protection hardware disables PWM outputs, the PWM generator continues to run, only the output pins are forced to logic 0, logic 1, or tristated depending on the values of Fault States in OCTRL[PWMxFS].

You can find more detailed information about the fault in the reference manual from chapter 48.4.17 Output Control Register (PWMx_SMnOCTRL).

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a8Chcx
Contributor V

Hi nxf86756,

I have the same motor control hardware as MC56F8367.

It works fine with MC56F8367. I checked the MC56F8367, there is no fault output configuration, just says PWM output disabled...I believe that it means tristate, right?

For KV58F, the fault output status is configurable. The original fault output is 1 that causes over-current when protection happens. 

If I want to configure it in the same way as MC56F8367, it should be configured as 0x02 or 0x03(tristate)?

I just want to confirm it from your side because I already damage the several board...

Thanks,

Christie

 

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_Leo_
NXP TechSupport
NXP TechSupport

Hi Christie,

I have consulted the 56F8300 Peripheral User Manual and indeed PWM pin outputs are in tri-state if Output Pad Enable (PAD_EN) bit in PWM Output Control (PMOUT) is cleared.

nxf86756_0-1669399904244.png

So on the KV5x it is necessary to set the Fault state (PWMxFS) to either 10 or 11 to make the output tristated.

Just to clarify, tristated mode the output pin becomes high impedance when the Fault event happens, so in the case, external pull up/down resistor determines the logic of the PWM_xA, if you connect a pull-up resistor on the pin, the PWM_xA pin will be high, if you connect a pull-down resistor on the pin, the PWM_xA pin will be low.

Hope it helps you!

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a8Chcx
Contributor V

Hi,

I did more testing and mapping register for SUB 0,1,2 is 0xf099. So, it will protect three phases at the same time...

When the moving is protected by fault0 or fault3, I can see there is very high current.

For BLDC, can I disable three phases at the same time, and will cause very high current?

If so, there is any recommendation for this protection?

Thanks,

Christie

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