KV5 TRACE_CLKOUT Divider

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KV5 TRACE_CLKOUT Divider

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ohiogt
Contributor III

I'm using a MKV58 and observing the TRACE_CLKOUT.  I found the divider enable in CLKDIV4 disables the output but the divisor appears to have no effect.  I only see the fixed divide-by-2 applied to MCGOUTCLK.  Are additional configuration steps required?

SIM->CLKDIV4 &= ~(SIM_CLKDIV4_TRACEDIV_MASK | SIM_CLKDIV4_TRACEFRAC_MASK);
SIM->CLKDIV4 |= (SIM_CLKDIV4_TRACEDIVEN_MASK | SIM_CLKDIV4_TRACEDIV(3U));

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miduo
NXP Employee
NXP Employee

Hi,

The Trace clock depends on two clock sources - MCGOUTCLK and Core/system in SIM_SOPT2[TRACECLKSEL]. The trace clock divider setup in SIM_CLKDIV4[TRACEFRAC,TRACEDIV]. The TRACE_CLKOUT pin will be at maximum half of the selected clock source.

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ohiogt
Contributor III

Fang,

I understand the basic operation, my issue is that the divisor and frac settings appear to have no effect on the clock output.  Do you have any information on this?

Shawn

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