K82: access to SRF and VBAT register files with User privileges

[EugeneHiihtaja]

Hi !

Do I undestand right :

- VBAT and SR addresses window spaces mapped to AIPSx bridge areas directly

- As result access to VBAT&SR can't be protected by MPU or AIPSx bridge settings

  and it is possible to access to those spaces in User execution mode ( And Supervisor as well ) ?

- for enable access to VBAT & SR , bit29 ( RTC access control bit ) should be enabled in SIM_SCGC6 register ?

Looks like no any dependencies to RTC clock and line CLOCK_EnableClock(kCLOCK_Rtc0) is not mandatory

for read/write to those Register Files. And there are keep values over reboot operation.

But access with User priviliges cause BusFault.

How ro activate AIPSx type of restriction to those areas and have access with User privileges  and able to write protect it from Supervisor accesses ?

Regards,

Eugene

[jorge_a_vazquez]

Hi Eugene Hiihtaja

According to Reference Manual:

Both VBAT register file and System register file have a slot number, so you can grant different access levels with the slot number in the AIPSx_PACRn register.

for enable access to VBAT & SR, bit29 ( RTC access control bit ) should be enabled in SIM_SCGC6 register ?.

No, there is no dependency in the RTC and the register files.

Hope this helps

Regards

[EugeneHiihtaja]

Hi Antonio !

For access to register files I'm using address space definitions :

/* System Register File ( 32 bytes , 8 dwords ) base address */
#define SRF_BASE (0x40041000U)
/* SRF base pointer */
#define SRF ((volatile uint32_t *)SRF_BASE)

/* VBAT Register File ( 128 bytes, 32 dwords) base address */
#define VBATRF_BASE (0x4003E000U)
/* VBATRF base pointer */
#define VBATRF ((volatile uint32_t *)VBATRF_BASE)

It means AIPSx registers are the same as real address space of register files ?

Or first 32bit register is reserved for AIPS slot and after that register file is allocated ?

Regards,

Eugene