K70F120M compatibility with TWR-SER and TWR-SER2 boards

[muhammad_qasim]

Hi

I am working on TWR-K70F120m kit. I have successfully developed & run Serial, I2C, SPI, SDMMC, NAND and Ethernet drivers on TWR-K70F120M and TWRTWR-SER boards.

When I connect TWR-SER2 board in my tower kit [For USB High Speed Development], then image is not flashed even connection is not established with probe (JLINK).

However, after throwing away TWR-SER module from TWR-K70F120M kit and Placing jumper at J24 on TWR-SER2 board, image is flashed and sample application (say hello world) is running.

My Question is

1. Does TWR-K70F120M kit is compatible with TWR-SER and TWR-SER2 boards? All three board can work at same time?  i.e. Ethernet & Serial are working on TWR-SER while USB High Speed work on TWR-SER2 board at the same time?

2. J24 works as Host if jumper is not placed and works as Device if jumper is placed on TWR-SER2 [As written in Quick Start Guide of TWR-SER2]. Now if I do not connect jumper at J24, then imaged is not flashed and connection is not established. It appears that USB High Speed can not be used as Host?

3. What is recommended jumper/switch setting to work together all these modules?

[Paul_Tian]

Hi, Hafiz
1. TWR-K70F120M KIT cannot use with TWR-SER and TWR-SER2 at the same time.

2. Which project you used for high-speed USB Host function? Freescale USB stack?

Best Regards

Paul

[muhammad_qasim]

Hi Paul,

Thanks for reply. First two questions have already been solved. I think, we can use TWR-SER and TWR-SER2 boards at the same time. See attached figure.

I have done following settings/configurations

1. TWR-K70F120M: No Jumper on J18 and J19. Other jumpers are at default settings

2. TWR-SER2:        No Jumper on J16, J21 and J24. Other jumpers are at default settings

3. Power Supply:     From Primary Elevator, SW1 switch is at "USB" Position. i.e. 1-2. Other jumpers are at default settings

4. Due to pin sharing between JTAG and ULPI PHY, I am flashing the code in internal ROM, Removing the JTAG and after power reset, checking the functionality of USB HS Device

5. Did following initialization

WRITE32(LMEM_PCCCR, READ32(LMEM_PCCCR) & (~LMEM_PCCCR_ENCACHE_MASK)); /* Disable cache */

WRITE32(SIM_SCGC7, READ32(SIM_SCGC7) | (4) );                                                             /* Enable MPU */

WRITE32(AXBS_PRS1, (UINT32) 0x70543216UL);                                                                  /* Increase priority for usb module */

WRITE32(MPU_CESR, READ32(MPU_CESR) & 0xFFFFFFFE);                                             /* Disable the MPU to allow USB to access memory */

WRITE32(SIM_CLKDIV2, READ32(SIM_CLKDIV2) | USBHS_FRAC | SIM_CLKDIV2_USBHSDIV(1) ); /* Set Clock Dividers for USB High Speed OTG (Divide reference clock to obtain 60MHz) */

WRITE32(SIM_SOPT2, READ32(SIM_SOPT2) | (SIM_SOPT2_USBHSRC));                                     /* Selects the clock source before clock divider for the USB 60 MHz clock (MCGPLL0CLK Clock is selected) */

WRITE32(SIM_MCR, READ32(SIM_MCR) | (SIM_MCR_ULPICLKOBE) );                                         /* Provide Interanl generated 60MHz ULPI clock to external ULPI PHY */

WRITE32(SIM_SCGC6, READ32(SIM_SCGC6) | (SIM_SCGC6_USBHS) );                                       /* Enable USB High Speed OTG Clock */

/* Set ULPI_CLK, ULP_NXT, ULP_STP, ULP_DIR and ULPI_DATA 0-7 at PORTA 6-11 and 24-29 on ALT 2 mode*/

My Question is 

1. SIM_MCR[ULPICLKOBE] bit must be set to use ULPI PHY but it is not used in MQX and USB Stack. Why?

2. SIM_SOPT2 |= SIM_SOPT2_USBH_CLKSEL_MASK; [This bit is set in MQX and USB Stack but this bit does not exist in Processor Manual. Why it is used?]

3. Can you please verify above settings/configurations/initialization?

4 Is there any verified demo (Host and Device) to be tested on this board?

Regards

[juanmanuelpanie]

Hi, Hafiz,

I just want to ask something to you. I'm a beginner with K70 kit, and trying to communicate the board with PC by using the UART. I just initialize the UART0 module, but I do not know how to make the relashion between that module and the connector DB9 at the TWR-SER. Could you help me with this? Tell me about how you did with your projects. Thanks in advance and sorry again

Regards

Juan Manuel