K60D100M unused ethernet pins

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K60D100M unused ethernet pins

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zachquinn
Contributor I

Hi Everyone,

I am using the TWR-K60D100M and TWR-SER schematic as a guideline for moving our system to a dedicated PCB. However, I am confused by looking at page 8 of the electrical schematic for the TWR-K60D100M: Many of the pins from A12-A20 and B12-B20 do not make it back to the MCU. Most interestingly, TXCLK and RXCLK don't get bussed back...this seems like it will not function.

Does anyone have some insight for this? Sorry if this is a really obvious question. I am new to the PCB field, Ethernet, and the Tower System! Any help is very appreciated.

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DavidS
NXP Employee
NXP Employee

Hi Zac,

The short story is the TWR-SER card is being setup for RMII mode which reduces the number of Ethernet signals required.

The TWR-SER card is also sourcing the 50MHz clock to the PHY and it gets jumpered to return to the MCU/TWR-K60D100M card.  The MQX RTOS software configured to use external 50MHz clock signal as the MCU clock source.

With both the MCU and PHY being clocked by the same source, the clock domains are the same and the TXCLK and RXCLK are not needed.

Hope this helps.

Regards,

David

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657件の閲覧回数
zachquinn
Contributor I

Hi David,

Thank you so much for your help! I will proceed with the design based on your help, and let you guys know how the project turns out! Thanks!

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DavidS
NXP Employee
NXP Employee

Hi Zac,

The short story is the TWR-SER card is being setup for RMII mode which reduces the number of Ethernet signals required.

The TWR-SER card is also sourcing the 50MHz clock to the PHY and it gets jumpered to return to the MCU/TWR-K60D100M card.  The MQX RTOS software configured to use external 50MHz clock signal as the MCU clock source.

With both the MCU and PHY being clocked by the same source, the clock domains are the same and the TXCLK and RXCLK are not needed.

Hope this helps.

Regards,

David

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