Hi all,
Need a little help here.
I'm using K21FN1M0A on one of my custom design. My firmware consists of a bootloader and the actual firmware. I want to run my board in high gain crystal mode (I'm aware that a 1M Ohm resistor needs to be added). Here is the clock description of each piece of software:
Bootloader: use low power crystal mode
Firmware: Use high gain
Observation:
1 - When I configured my firmware to work in low power crystal mode, everything started up fine. The bootloader started up and then the firmware.
2 - After I reconfigured my firmware for high gain crystal mode, the bootloader started (or at least I think it started). Then the firmware never ran (current draw dropped 8mA). I then used J-Link commander but it reported that JTAG Debug power domain was off
3 - After I reconfigured my firmware to high gain crystal mode, bootloader and firmware started ok.
So it is obvious that I have things working. My question is this
Why did going from low power to high gain crystal mode make the K21 hang? I couldn't really work it out from the clocking block diagram.
Much appreciated if somebody sheds some light on this. It has been bugging me for days.
Many thanks,
Hi,
There with the external crystal circuit design difference for oscillator low-power mode vs. high-gain mode.
In general, the external oscillator circuit will decide which mode using:
Could you provide the external clock circuit schematics?
Thank you for the attention.
Have a great day,
Ma Hui
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