Hi Madan M,
Sorry for giving you reference about VLPS instead of VLPR mode.
You can check this application note about Power Magaement for Kinetis (http://cache.freescale.com/files/32bit/doc/app_note/AN4503.pdf)
In this AN, you can notice in section 2.5.3 (in document it is written as 2.5.2 but it was a typo error) the sequence to enter in VLPR:
- Be in BLPI (using fast IRC for the MCG or LIRC is using MCG_Lite) or BLPE clock mode.
- Set the core freqnecy to 4 MHz or less and flash clock to 1 MHz or less (800kHz - 1MHz).
- Not have the slow IRC enabled.
- Disable the clock monitor.
- Disable FIRC on devices using the MCG_Lite.
- Write the SMC_PMCTRL RUNM bits to enter VLPR.
Remember to set PMPROT[AVLP] = 1 to allow MCU to enter to VLPR mode.
You can check this AN for more information.
If you problem persists please let me know it.
Best Regards,
Isaac
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