FRDM-KL02Z Power Modes drawing too much current

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FRDM-KL02Z Power Modes drawing too much current

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867件の閲覧回数
ben_king
Contributor II

I have a FRDM-KL02Z board which seems to be drawing a much higher current than stated on the data sheet. I am testing the current across the header J4 on the board, with resistors R27 and R32 removed from the board. In order to remove any issues that may come from my own code I've tested the board using the "power_mode_switch" demo app from the nxp website, and interfacing with the board using UART pins on header J8 instead of via openSDA. The headers J5 and J11 have been disconnected with R31 and R28 also being removed from the board. 

Power Switcher Test Results.png

The results I've recorded seem to be much higher than the documentation suggests, especially in the very low power modes. Any suggestions on what I can try in order to bring the current draw down?

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1 解決策
655件の閲覧回数
Robin_Shen
NXP TechSupport
NXP TechSupport

The external voltage of UART pins will affect the current.

You can select VLPS mode by modify the codes shown below:

power_mode_switch.png

I did not remove J5 \J11\R31 \R28, I can get 2uA in VLPS mode. The OpenSDA firmware has attached.

You can also try to remove the R16 and R17.

Best Regards,

Robin

 

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656件の閲覧回数
Robin_Shen
NXP TechSupport
NXP TechSupport

The external voltage of UART pins will affect the current.

You can select VLPS mode by modify the codes shown below:

power_mode_switch.png

I did not remove J5 \J11\R31 \R28, I can get 2uA in VLPS mode. The OpenSDA firmware has attached.

You can also try to remove the R16 and R17.

Best Regards,

Robin

 

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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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655件の閲覧回数
ben_king
Contributor II

It looks like the way I'd setup up the headers stopped things from working correctly. The UART connection was also having a big effect on the board. Cheers for the help!

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655件の閲覧回数
mjbcswitzerland
Specialist V


Hi Ben

If using UARTs make sure that the pins are not floating (valid for all GPIO) since that causes high leakage.

Some low power links:
Low power and LLWU: http://www.utasker.com/kinetis/LLWU.html
Low power videos:
- https://youtu.be/kWNlsAoMly4
- https://youtu.be/iZEMRiDmHzw
- https://youtu.be/v4UnfcDiaE4
VLPS with continuous UART operation: https://community.nxp.com/message/421247#421247

Reference binary for FRDM-KL02Z with dynamic low power operation: http://www.utasker.com/kinetis/FRDM-KL02Z.html

Regards

Mark

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655件の閲覧回数
ben_king
Contributor II

Also, I forgot to mention that the voltage for the tests is being supplied through the coin cell holder BT1.

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