Hi
12MHz crystal can be used for 180MHz operation (in HSRUN mode).
http://www.utasker.com/kinetis/MCG.html
See below (simulation of K66 board) with the following settings:
#define CRYSTAL_FREQUENCY 12000000 // 12 MHz crystal
#define CLOCK_DIV 1 // input must be divided to 8MHz..16MHz range (/1 to /8)
#define CLOCK_MUL 30 // the PLL multiplication factor to achieve operating frequency of 180MHz (x16 to x47 possible) [PLL output range 90..180MHz - VCO is PLL * 2]
#define BUS_CLOCK_DIVIDE 3 // 180/3 to give 60MHz (max. 60MHz)
#define FLEX_CLOCK_DIVIDE 3 // 180/3 to give 60MHz (max. 60MHz)
#define FLASH_CLOCK_DIVIDE 7 // 180/7 to give 25.714MHz (max. 28MHz)
Beware of restrictions in HSRUN mode - for example flash programming is not possible.
Regards
Mark
Thank you Mark Butcher,
This and your advice at "MK66 180 Mhz, how config clock with Config Tools " has sorted thing out. Some things to mention/ponder...
1) Unlike my code your code did not hang at IREFST. The difference was you do not set HGO.
2) I found that 180MHz runs without setting RUNHS. I'm presuming while this is possible, it only when RUNHS is set that 180MHz is guaranteed.
3) Wonder if the Flash issue is because of the elevated voltage in RUNHS mode.
Anyway, thank you,
Hi
Yes it is possible to run at 180MHz in RUN mode (without Flash programming restrictions) but it is not using the processor within its guaranteed specification (over-clocking). It is OK to do this in a hobby project but would not be acceptable in a serious product development and negligent in some products (especially anything that required high reliability or were safety critical in any respects).
Regards
Mark
Hi
12MHz crystal can be used for 180MHz operation (in HSRUN mode).
http://www.utasker.com/kinetis/MCG.html
See below (simulation of K66 board) with the following settings:
#define CRYSTAL_FREQUENCY 12000000 // 12 MHz crystal
#define CLOCK_DIV 1 // input must be divided to 8MHz..16MHz range (/1 to /8)
#define CLOCK_MUL 30 // the PLL multiplication factor to achieve operating frequency of 180MHz (x16 to x47 possible) [PLL output range 90..180MHz - VCO is PLL * 2]
#define BUS_CLOCK_DIVIDE 3 // 180/3 to give 60MHz (max. 60MHz)
#define FLEX_CLOCK_DIVIDE 3 // 180/3 to give 60MHz (max. 60MHz)
#define FLASH_CLOCK_DIVIDE 7 // 180/7 to give 25.714MHz (max. 28MHz)
Beware of restrictions in HSRUN mode - for example flash programming is not possible.
Regards
Mark