Erase Issue with MK10FX512

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Erase Issue with MK10FX512

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Ali2006
Contributor II

I'm currently using the MK10FX512 device in an application for which we are in the prototype stage.  We have 15 controllers operating but one of those controllers has just started to Fail during the Erase of addresses in the D-Flash section of the memory map starting at 0x10038000.  We currently do not have any code at this location.  We are using the FLEXNVM feature of the chip and have the DEPART set to 0x04. (448K d-Flash, 64K EEPROM Backup)   and the EESIZE set to 0x02 (4K).  EESPLIT is st to 0x00 which gives two section 1/8 and 7/8ths.   While the MK10FX512 datasheet does not explicity state that EESPLIT is available I did have this confirmed in a previous post.   The problem we are having is that the controller currently just hangs waiting for the CCIF bit in the FSTAT register.    This code we are using in this unit is identical to the code we have been using for years to erase/program the flash.  The effected board DOES properly erase all the flash in the p-flash area, as well as all locations below 0x10038000 in the dflash.  When I try to erase this address that is when the code fails.  I have not determined if I am able to erase any other addresses above this location at this time.  we did just recently re-partition this device from a 2K EEPROM to a 4K EEPROM size.  We did a full Mass erase from the PE programming pod and then re-partitioned the device.   

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1,107 Views
Ali2006
Contributor II

Hello Ma Hui,

I have checked the FTFE_FDPROT register on this unit and it is set to 0xFF.

So no protection is enabled.  Also all the FTFE_FPTROT0, T1, T2 and T3 are also all set to 0xFF.

Do you have any further suggestions as to what may be causing this problem, or how to resolve it, or track down the cause of the issue?

Do you have any specifications on what occurs when a flash location has been exhausted?

Thanks.

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1,108 Views
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

Sorry for the later reply.

I don't quite understand the "POD"  abbreviation means of "I am able to mass erase from the PE  Micro Universal multilink POD over JTAG ". What's "POD" means?

And there seems your application works with some in-program Flash operation code: "I now have the code programmed in using the PE pod and everything does run properly.. including my data stored in EEPROM/FLEXNVM is.  All locations are storing and saving just as they should.  So that means addresses in the upper 64K of the D-Flash are erasing and programming just fine.  " If that means, your application code call the Flash commander could do erase/program D-Flash operation?

And about your question: "Do you have any specifications on what occurs when a flash location has been exhausted?"

What's the means about the Flash location has been exhausted? If the Flash location had been reach the Flash operation cycling endurance?

In fact, the Flash module provide "Read 1s Block/Section" command to check if that Flash block/section reach the Flash cycling endurance. Have you tried those Flash command?

Only the 'normal' read level should be employed during normal flash usage. The nonstandard, 'user' and 'factory' margin levels should be employed only in special cases.
They can be used during special diagnostic routines to gain confidence that the device is not suffering from the end-of-life data loss customary of flash memory devices.

Thank you for the attention.


Have a great day,
Ma Hui

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1,108 Views
Ali2006
Contributor II

Hello

Thanks for the response.  Yes you got the question correct.  I have one unit out of 15 that will not erase starting at location 0x10038000. 

I am able to mass erase from the PE  Micro Universal multilink POD over JTAG  and I can program my application from the PE POD.. but as I mentioned, my program does not extend into this D-Flash area at this time.. So the PE Programmer is not trying to erase this location when it is programming my system.   Having the PE Programmer mass erase the chip and then reprogram the application file does not "SOLVE" the problem.  Even after this step when my code tries to erase this location during is own reprogramming cycle. it still hangs at the exact same location.   I now have the code programmed in using the PE pod and everything does run properly.. including my data stored in EEPROM/FLEXNVM is.  All locations are storing and saving just as they should.  So that means addresses in the upper 64K of the D-Flash are erasing and programming just fine.  

**Edit - I have placed some code into the d-flash using the linker file starting at location 0x10038000.  The PE programming pod seems to be able to erase location from 0x1003800 - 0x10044000, but fails at 0x10045000 address, just sitting in a constant erase loop waiting for a response.  I have to cancel the command to get the utility to STOP waiting for a erase response.

Does anyone know the symptoms/indication of a flash being "used up" I don't think I've exhausted my write cycle capability, and as I mentioned I don't have any code at this location, nor is the EEPROM located at this address.. but I was just wondering if when the flash is exhausted is this what happens ( the System waiting for a CCIF that never occurs after an erase command to the exhausted block)? 

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1,108 Views
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi ,

From above setting, the 64K EEPROM Backup memory is in range of [0x10070000 ~ 0x1007FFFF].
Could you provide the Data Flash Protection Register (FTFE_FDPROT) value?
Thank you for the attention.


Have a great day,
Ma Hui

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1,108 Views
Hui_Ma
NXP TechSupport
NXP TechSupport

Hi,

From above description, there with one MK10FX512 out of 15 MK10FX512 MCUs with the issue(could not program 0x10038000 and above Flash range). Right?

Have you tried to use Segger J-Link do a "mass erase" to that problem MK10FX512 chip?

If that could fix the issue or not?

Thank you for the attention.


Have a great day,
Ma Hui

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