Hi Stefano,
The limitation of the Major Loop Size could be settled by enabling the Scatter/Gather Processing feature of the eDMA module. To utilize the feature, we need to:
1. Define an object/variable with the TCD type, as shown below, which takes 32 bytes.
typedef struct _edma_tcd
{
__IO uint32_t SADDR; /*!< SADDR register, used to save source address */
__IO uint16_t SOFF; /*!< SOFF register, save offset bytes every transfer */
__IO uint16_t ATTR; /*!< ATTR register, source/destination transfer size and modulo */
__IO uint32_t NBYTES; /*!< Nbytes register, minor loop length in bytes */
__IO uint32_t SLAST; /*!< SLAST register */
__IO uint32_t DADDR; /*!< DADDR register, used for destination address */
__IO uint16_t DOFF; /*!< DOFF register, used for destination offset */
__IO uint16_t CITER; /*!< CITER register, current minor loop numbers, for unfinished minor loop.*/
__IO uint32_t DLAST_SGA; /*!< DLASTSGA register, next stcd address used in scatter-gather mode */
__IO uint16_t CSR; /*!< CSR register, for TCD control status */
__IO uint16_t BITER; /*!< BITER register, begin minor loop count. */
} edma_tcd_t;
2. When configuring the TCDn: 1)initialize the DMA_TCDn_DLASTSGA register with the address of the TCD object; 2) set the DMA_TCDn_CSR[ESG] bit .
3. Initiate the first DMA transfer as usual.
4. Initialize the TCD object with new value based on the requirement before the current major loop is completed.
When the current major loop is completed, the eDMA engine will load the defined TCD object to the current channel TCD. Then new DMA transfer could be triggered by the following hardware trigger, the coming PWM in your case.
Note: The TCD object address must be 0-modulo-32-byte, else a configuration error is reported.
Regards,
Dean
Best Regards,
Dean